mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
188 lines
5.6 KiB
LLVM
188 lines
5.6 KiB
LLVM
; Like frame-02.ll, but with long doubles rather than floats. Some of the
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; cases are slightly different because we need to allocate pairs of FPRs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; This function should require all FPRs, but no other spill slots.
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; We need to save and restore 8 of the 16 FPRs, so the frame size
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; should be exactly 160 + 8 * 8 = 224. The CFA offset is 160
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; (the caller-allocated part of the frame) + 224.
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define void @f1(fp128 *%ptr) {
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; CHECK: f1:
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; CHECK: aghi %r15, -224
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; CHECK: .cfi_def_cfa_offset 384
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; CHECK: std %f8, 216(%r15)
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; CHECK: std %f9, 208(%r15)
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; CHECK: std %f10, 200(%r15)
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; CHECK: std %f11, 192(%r15)
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; CHECK: std %f12, 184(%r15)
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; CHECK: std %f13, 176(%r15)
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; CHECK: std %f14, 168(%r15)
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; CHECK: std %f15, 160(%r15)
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; CHECK: .cfi_offset %f8, -168
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; CHECK: .cfi_offset %f9, -176
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; CHECK: .cfi_offset %f10, -184
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; CHECK: .cfi_offset %f11, -192
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; CHECK: .cfi_offset %f12, -200
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; CHECK: .cfi_offset %f13, -208
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; CHECK: .cfi_offset %f14, -216
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; CHECK: .cfi_offset %f15, -224
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; ...main function body...
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; CHECK: ld %f8, 216(%r15)
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; CHECK: ld %f9, 208(%r15)
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; CHECK: ld %f10, 200(%r15)
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; CHECK: ld %f11, 192(%r15)
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; CHECK: ld %f12, 184(%r15)
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; CHECK: ld %f13, 176(%r15)
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; CHECK: ld %f14, 168(%r15)
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; CHECK: ld %f15, 160(%r15)
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; CHECK: aghi %r15, 224
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; CHECK: br %r14
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%l0 = load volatile fp128 *%ptr
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%l1 = load volatile fp128 *%ptr
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%l4 = load volatile fp128 *%ptr
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%l5 = load volatile fp128 *%ptr
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%l8 = load volatile fp128 *%ptr
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%l9 = load volatile fp128 *%ptr
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%l12 = load volatile fp128 *%ptr
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%l13 = load volatile fp128 *%ptr
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%add0 = fadd fp128 %l0, %l0
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%add1 = fadd fp128 %l1, %add0
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%add4 = fadd fp128 %l4, %add1
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%add5 = fadd fp128 %l5, %add4
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%add8 = fadd fp128 %l8, %add5
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%add9 = fadd fp128 %l9, %add8
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%add12 = fadd fp128 %l12, %add9
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%add13 = fadd fp128 %l13, %add12
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store volatile fp128 %add0, fp128 *%ptr
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store volatile fp128 %add1, fp128 *%ptr
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store volatile fp128 %add4, fp128 *%ptr
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store volatile fp128 %add5, fp128 *%ptr
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store volatile fp128 %add8, fp128 *%ptr
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store volatile fp128 %add9, fp128 *%ptr
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store volatile fp128 %add12, fp128 *%ptr
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store volatile fp128 %add13, fp128 *%ptr
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ret void
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}
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; Like f1, but requires one fewer FPR pair. We allocate in numerical order,
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; so %f13+%f15 is the pair that gets dropped.
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define void @f2(fp128 *%ptr) {
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; CHECK: f2:
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; CHECK: aghi %r15, -208
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; CHECK: .cfi_def_cfa_offset 368
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; CHECK: std %f8, 200(%r15)
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; CHECK: std %f9, 192(%r15)
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; CHECK: std %f10, 184(%r15)
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; CHECK: std %f11, 176(%r15)
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; CHECK: std %f12, 168(%r15)
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; CHECK: std %f14, 160(%r15)
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; CHECK: .cfi_offset %f8, -168
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; CHECK: .cfi_offset %f9, -176
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; CHECK: .cfi_offset %f10, -184
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; CHECK: .cfi_offset %f11, -192
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; CHECK: .cfi_offset %f12, -200
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; CHECK: .cfi_offset %f14, -208
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; CHECK-NOT: %f13
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; CHECK-NOT: %f15
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; ...main function body...
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; CHECK: ld %f8, 200(%r15)
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; CHECK: ld %f9, 192(%r15)
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; CHECK: ld %f10, 184(%r15)
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; CHECK: ld %f11, 176(%r15)
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; CHECK: ld %f12, 168(%r15)
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; CHECK: ld %f14, 160(%r15)
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; CHECK: aghi %r15, 208
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; CHECK: br %r14
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%l0 = load volatile fp128 *%ptr
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%l1 = load volatile fp128 *%ptr
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%l4 = load volatile fp128 *%ptr
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%l5 = load volatile fp128 *%ptr
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%l8 = load volatile fp128 *%ptr
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%l9 = load volatile fp128 *%ptr
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%l12 = load volatile fp128 *%ptr
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%add0 = fadd fp128 %l0, %l0
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%add1 = fadd fp128 %l1, %add0
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%add4 = fadd fp128 %l4, %add1
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%add5 = fadd fp128 %l5, %add4
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%add8 = fadd fp128 %l8, %add5
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%add9 = fadd fp128 %l9, %add8
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%add12 = fadd fp128 %l12, %add9
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store volatile fp128 %add0, fp128 *%ptr
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store volatile fp128 %add1, fp128 *%ptr
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store volatile fp128 %add4, fp128 *%ptr
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store volatile fp128 %add5, fp128 *%ptr
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store volatile fp128 %add8, fp128 *%ptr
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store volatile fp128 %add9, fp128 *%ptr
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store volatile fp128 %add12, fp128 *%ptr
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ret void
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}
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; Like f1, but requires only one call-saved FPR pair. We allocate in
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; numerical order so the pair should be %f8+%f10.
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define void @f3(fp128 *%ptr) {
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; CHECK: f3:
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; CHECK: aghi %r15, -176
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; CHECK: .cfi_def_cfa_offset 336
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; CHECK: std %f8, 168(%r15)
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; CHECK: std %f10, 160(%r15)
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; CHECK: .cfi_offset %f8, -168
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; CHECK: .cfi_offset %f10, -176
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; CHECK-NOT: %f9
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; CHECK-NOT: %f11
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; CHECK-NOT: %f12
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; CHECK-NOT: %f13
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; CHECK-NOT: %f14
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; CHECK-NOT: %f15
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; ...main function body...
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; CHECK: ld %f8, 168(%r15)
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; CHECK: ld %f10, 160(%r15)
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; CHECK: aghi %r15, 176
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; CHECK: br %r14
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%l0 = load volatile fp128 *%ptr
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%l1 = load volatile fp128 *%ptr
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%l4 = load volatile fp128 *%ptr
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%l5 = load volatile fp128 *%ptr
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%l8 = load volatile fp128 *%ptr
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%add0 = fadd fp128 %l0, %l0
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%add1 = fadd fp128 %l1, %add0
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%add4 = fadd fp128 %l4, %add1
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%add5 = fadd fp128 %l5, %add4
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%add8 = fadd fp128 %l8, %add5
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store volatile fp128 %add0, fp128 *%ptr
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store volatile fp128 %add1, fp128 *%ptr
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store volatile fp128 %add4, fp128 *%ptr
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store volatile fp128 %add5, fp128 *%ptr
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store volatile fp128 %add8, fp128 *%ptr
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ret void
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}
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; This function should use all call-clobbered FPRs but no call-saved ones.
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; It shouldn't need to create a frame.
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define void @f4(fp128 *%ptr) {
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; CHECK: f4:
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; CHECK-NOT: %r15
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; CHECK-NOT: %f8
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; CHECK-NOT: %f9
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; CHECK-NOT: %f10
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; CHECK-NOT: %f11
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; CHECK-NOT: %f12
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; CHECK-NOT: %f13
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; CHECK-NOT: %f14
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; CHECK-NOT: %f15
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; CHECK: br %r14
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%l0 = load volatile fp128 *%ptr
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%l1 = load volatile fp128 *%ptr
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%l4 = load volatile fp128 *%ptr
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%l5 = load volatile fp128 *%ptr
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%add0 = fadd fp128 %l0, %l0
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%add1 = fadd fp128 %l1, %add0
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%add4 = fadd fp128 %l4, %add1
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%add5 = fadd fp128 %l5, %add4
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store volatile fp128 %add0, fp128 *%ptr
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store volatile fp128 %add1, fp128 *%ptr
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store volatile fp128 %add4, fp128 *%ptr
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store volatile fp128 %add5, fp128 *%ptr
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ret void
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}
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