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5438d76416
Added checks for regs which should not be 15. rdar://problem/9237734 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128945 91177308-0d34-0410-b5e6-96231b3b80d8
10 lines
640 B
Plaintext
10 lines
640 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
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# Opcode=261 Name=RSCrs Format=ARM_FORMAT_DPSOREGFRM(5)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 0: 0: 1: 1| 0: 0: 0: 0| 1: 1: 1: 0| 0: 1: 0: 0| 1: 1: 1: 1| 1: 0: 0: 0| 0: 1: 0: 1| 1: 1: 1: 1|
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# -------------------------------------------------------------------------------------------------
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# if d == 15 || n == 15 || m == 15 || s == 15 then UNPREDICTABLE;
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0x5f 0xf8 0xe4 0x30
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