llvm-6502/test/CodeGen/Hexagon/args.ll
Sirish Pande 0031af6615 Enable all Hexagon tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 16:13:12 +00:00

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418 B
LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = #7
; CHECK: memw(r29 + #0) = r[[T0]]
; CHECK: r0 = #1
; CHECK: r1 = #2
; CHECK: r2 = #3
; CHECK: r3 = #4
; CHECK: r4 = #5
; CHECK: r5 = #6
define void @foo() nounwind {
entry:
call void @bar(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7)
ret void
}
declare void @bar(i32, i32, i32, i32, i32, i32, i32)