Juergen Ributzka 06bb1ca1e0 Reapply [FastISel][AArch64] Add support for more addressing modes (r215597). ... Note: This was originally reverted to track down a buildbot error. Reapply without any modifications. Original commit message: FastISel didn't take much advantage of the different addressing modes available to it on AArch64. This commit allows the ComputeAddress method to recognize more addressing modes that allows shifts and sign-/zero-extensions to be folded into the memory operation itself. For Example: lsl x1, x1, #3 --> ldr x0, [x0, x1, lsl #3] ldr x0, [x0, x1] sxtw x1, w1 lsl x1, x1, #3 --> ldr x0, [x0, x1, sxtw #3] ldr x0, [x0, x1] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216013 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-19 19:44:17 +00:00
..
Analysis
Assembler	IR: Don't add inbounds to GEPs of extern_weak variables	2014-08-16 01:54:32 +00:00
Bindings
Bitcode	verify-uselistorder: Call verifyModule() and improve output	2014-08-18 23:44:14 +00:00
BugPoint
CodeGen	Reapply [FastISel][AArch64] Add support for more addressing modes (r215597).	2014-08-19 19:44:17 +00:00
DebugInfo	Reapply [FastISel][X86] Use XOR to materialize the "0" value (r215594).	2014-08-19 19:44:10 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker	Set comdats when lazily linking functions.	2014-08-15 20:17:08 +00:00
LTO
MC	[mips] Add assembler support for .set arch=x directive.	2014-08-19 14:22:52 +00:00
Object	llvm-objdump: don't print relocations in non-relocatable files.	2014-08-17 19:09:37 +00:00
Other
TableGen
tools	Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O	2014-08-18 20:21:02 +00:00
Transforms	Revert "Small refactor on VectorizerHint for deduplication"	2014-08-19 18:08:50 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh