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https://github.com/c64scene-ar/llvm-6502.git
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6902c687b0
Allow vector fabs operations on bitcasted constant integer values to be optimized in the same way that we already optimize scalar fabs. So for code like this: %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast) %ret = bitcast <2 x float> %fabs to i64 Instead of generating something like this: movabsq (constant pool loadi of mask for sign bits) vmovq (move from integer register to vector/fp register) vandps (mask off sign bits) vmovq (move vector/fp register back to integer return register) We should generate: mov (put constant value in return register) I have also removed a redundant clause in the first 'if' statement: N0.getOperand(0).getValueType().isInteger() is the same thing as: IntVT.isInteger() Testcases for x86 and ARM added to existing files that deal with vector fabs. One existing testcase for x86 removed because it is no longer ideal. For more background, please see: http://reviews.llvm.org/D4770 And: http://llvm.org/bugs/show_bug.cgi?id=20354 Differential Revision: http://reviews.llvm.org/D4785 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214892 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.5 KiB
LLVM
55 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-eabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s
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; CHECK-LABEL: test:
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; CHECK: vabs.f32 q0, q0
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define <4 x float> @test(<4 x float> %a) {
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%foo = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
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ret <4 x float> %foo
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}
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declare <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
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; CHECK-LABEL: test2:
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; CHECK: vabs.f32 d0, d0
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define <2 x float> @test2(<2 x float> %a) {
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%foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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ret <2 x float> %foo
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}
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declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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; No constant pool loads or vector ops are needed for the fabs of a
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; bitcasted integer constant; we should just return integer constants
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; that have the sign bits turned off.
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;
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; So instead of something like this:
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; mvn r0, #0
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; mov r1, #0
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; vmov d16, r1, r0
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; vabs.f32 d16, d16
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; vmov r0, r1, d16
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; bx lr
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;
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; We should generate:
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; mov r0, #0
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; mvn r1, #-2147483648
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; mov pc, lr
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; CHECK-LABEL: fabs_v2f32_1
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define i64 @fabs_v2f32_1() {
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%bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000
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%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
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%ret = bitcast <2 x float> %fabs to i64
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ret i64 %ret
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; CHECK: mvn r1, #-2147483648
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; CHECK-NOT: vabs
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}
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; CHECK-LABEL: fabs_v2f32_2
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define i64 @fabs_v2f32_2() {
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%bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF
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%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
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%ret = bitcast <2 x float> %fabs to i64
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ret i64 %ret
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; CHECK: mvn r0, #-2147483648
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; CHECK-NOT: vabs
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}
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