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699fd1909e
'insertps' patterns. This replaces two shuffles with a single insertps in very common cases. My next patch will extend this to leverage the zeroing capabilities of insertps which will allow it to be used in a much wider set of cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217100 91177308-0d34-0410-b5e6-96231b3b80d8
210 lines
8.7 KiB
LLVM
210 lines
8.7 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0001
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; ALL: pshufd {{.*}} # xmm0 = xmm0[0,0,0,1]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0020
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; ALL: pshufd {{.*}} # xmm0 = xmm0[0,0,2,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0112
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; ALL: pshufd {{.*}} # xmm0 = xmm0[0,1,1,2]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0300
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; ALL: pshufd {{.*}} # xmm0 = xmm0[0,3,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_1000
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; ALL: pshufd {{.*}} # xmm0 = xmm0[1,0,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_2200
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; ALL: pshufd {{.*}} # xmm0 = xmm0[2,2,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_3330
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; ALL: pshufd {{.*}} # xmm0 = xmm0[3,3,3,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_3210
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; ALL: pshufd {{.*}} # xmm0 = xmm0[3,2,1,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_2121
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; ALL: pshufd {{.*}} # xmm0 = xmm0[2,1,2,1]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
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ret <4 x i32> %shuffle
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}
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define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_0001
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; ALL: shufps {{.*}} # xmm0 = xmm0[0,0,0,1]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_0020
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; ALL: shufps {{.*}} # xmm0 = xmm0[0,0,2,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_0300
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; ALL: shufps {{.*}} # xmm0 = xmm0[0,3,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_1000
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; ALL: shufps {{.*}} # xmm0 = xmm0[1,0,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_2200
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; ALL: shufps {{.*}} # xmm0 = xmm0[2,2,0,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_3330
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; ALL: shufps {{.*}} # xmm0 = xmm0[3,3,3,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
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; ALL-LABEL: @shuffle_v4f32_3210
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; ALL: shufps {{.*}} # xmm0 = xmm0[3,2,1,0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x float> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
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; SSE2-LABEL: @shuffle_v4i32_0124
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; SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
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; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: @shuffle_v4i32_0124
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; SSE41: insertps {{.*}} # xmm0 = xmm0[0,1,2],xmm1[0]
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: @shuffle_v4i32_0124
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; AVX1: vinsertps {{.*}} # xmm0 = xmm0[0,1,2],xmm1[0]
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; AVX1-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0142
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; ALL: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
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; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,2]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
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; SSE2-LABEL: @shuffle_v4i32_0412
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; SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
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; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
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; SSE2-NEXT: movaps %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: @shuffle_v4i32_0412
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; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
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; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[2,0],xmm0[1,2]
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; AVX1-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
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; SSE2-LABEL: @shuffle_v4i32_4012
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; SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
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; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
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; SSE2-NEXT: movaps %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: @shuffle_v4i32_4012
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; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
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; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[0,2],xmm0[1,2]
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; AVX1-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0145
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; ALL: punpcklqdq {{.*}} # xmm0 = xmm0[0],xmm1[0]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_0451
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; ALL: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
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; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,3,1]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
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; SSE2-LABEL: @shuffle_v4i32_4501
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; SSE2: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: @shuffle_v4i32_4501
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; AVX1: punpcklqdq {{.*}} # xmm0 = xmm1[0],xmm0[0]
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; AVX1-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
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ret <4 x i32> %shuffle
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}
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define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
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; ALL-LABEL: @shuffle_v4i32_4015
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; ALL: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
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; ALL-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0,1,3]
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; ALL-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
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ret <4 x i32> %shuffle
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}
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