llvm-6502/test/CodeGen
Sirish Pande 26f61a158b Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03 21:52:53 +00:00
..
ARM Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs. 2012-05-02 22:17:40 +00:00
CellSPU
CPP
Generic
Hexagon Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
MBlaze
Mips
MSP430
PowerPC
PTX
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb Make test less fragile. 2012-04-27 20:48:18 +00:00
Thumb2 If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume 2012-04-26 01:13:36 +00:00
X86 Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982. 2012-05-03 07:12:59 +00:00
XCore