Jakob Stoklund Olesen 6b359ecd43 Enable SandyBridgeModel for all modern Intel P6 descendants. ...

All Intel CPUs since Yonah look a lot alike, at least at the granularity
of the scheduling models. We can add more accurate models for
processors that aren't Sandy Bridge if required. Haswell will probably
need its own.

The Atom processor and anything based on NetBurst is completely
different. So are the non-Intel chips.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178080 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-26 22:19:12 +00:00

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Analysis

BasicAA: Only query twice if the result of the more general query was MayAlias

2013-03-26 18:07:53 +00:00

Archive

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AsmParser

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Bitcode

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CodeGen

Fix the register scavenger for targets that provide custom spilling

2013-03-26 21:20:15 +00:00

DebugInfo

Fix missing std::. Not sure how this compiles for anyone else.

2013-03-21 00:57:21 +00:00

ExecutionEngine

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IR

Debug Info: Provide a means to update the members of a composite type

2013-03-26 21:59:17 +00:00

IRReader

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00

Linker

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MC

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Object

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Option

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Support

Add missing file to cmake build.

2013-03-26 01:29:15 +00:00

TableGen

Allow TableGen DAG arguments to be just a name.

2013-03-24 19:36:51 +00:00

Target

Enable SandyBridgeModel for all modern Intel P6 descendants.

2013-03-26 22:19:12 +00:00

Transforms

Make InstCombineCasts.cpp:OptimizeIntToFloatBitCast endian safe.

2013-03-26 15:36:14 +00:00

CMakeLists.txt

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00

LLVMBuild.txt

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00

Makefile

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00