llvm-6502/lib/Target/SystemZ
Rafael Espindola 930ca98433 Fix pr19645.
The fix itself is fairly simple: move getAccessVariant to MCValue so that we
replace the old weak expression evaluation with the far more general
EvaluateAsRelocatable.

This then requires that EvaluateAsRelocatable stop when it finds a non
trivial reference kind. And that in turn requires the ELF writer to look
harder for weak references.

Last but not least, this found a case where we were being bug by bug
compatible with gas and accepting an invalid input. I reported pr19647
to track it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-03 19:57:04 +00:00
..
AsmParser [C++] Use 'nullptr'. Target edition. 2014-04-25 05:30:21 +00:00
Disassembler [Modules] Make Support/Debug.h modular. This requires it to not change 2014-04-21 22:55:11 +00:00
InstPrinter [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE 2014-04-22 02:41:26 +00:00
MCTargetDesc Fix pr19645. 2014-05-03 19:57:04 +00:00
TargetInfo Prune redundant dependencies in LLVMBuild.txt. 2013-12-11 00:30:57 +00:00
CMakeLists.txt [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 2013-11-28 17:04:04 +00:00
LLVMBuild.txt Add proper dependencies to LLVMBuild.txt in llvm/lib. 2013-12-10 05:39:34 +00:00
Makefile [SystemZ] Add disassembler support 2013-05-14 10:17:52 +00:00
README.txt Add TargetLowering::prepareVolatileOrAtomicLoad 2013-12-10 10:49:34 +00:00
SystemZ.h [SystemZ] Update namespace formatting to match current guidelines 2014-03-06 10:38:30 +00:00
SystemZ.td Change the default of AsmWriterClassName and isMCAsmWriter. 2013-12-02 04:55:42 +00:00
SystemZAsmPrinter.cpp [SystemZ] Use "auto" for cast results 2014-03-06 11:22:58 +00:00
SystemZAsmPrinter.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZCallingConv.cpp
SystemZCallingConv.h [SystemZ] Update namespace formatting to match current guidelines 2014-03-06 10:38:30 +00:00
SystemZCallingConv.td [SystemZ] Rename 32-bit GPR registers 2013-09-30 08:48:38 +00:00
SystemZConstantPoolValue.cpp [SystemZ] Use "auto" for cast results 2014-03-06 11:22:58 +00:00
SystemZConstantPoolValue.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZElimCompare.cpp [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. 2014-04-29 07:58:41 +00:00
SystemZFrameLowering.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
SystemZFrameLowering.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZInstrBuilder.h [SystemZ] Update namespace formatting to match current guidelines 2014-03-06 10:38:30 +00:00
SystemZInstrFormats.td [SystemZ] Add MC support for interlocked-access 1 instructions 2013-12-24 15:14:05 +00:00
SystemZInstrFP.td [SystemZ] Use "let Predicates =" for blocks of new instructions 2014-03-21 11:04:54 +00:00
SystemZInstrInfo.cpp [C++] Use 'nullptr'. Target edition. 2014-04-25 05:30:21 +00:00
SystemZInstrInfo.h [C++] Use 'nullptr'. 2014-04-28 04:05:08 +00:00
SystemZInstrInfo.td [SystemZ] Use "let Predicates =" for blocks of new instructions 2014-03-21 11:04:54 +00:00
SystemZISelDAGToDAG.cpp [C++] Use 'nullptr'. Target edition. 2014-04-25 05:30:21 +00:00
SystemZISelLowering.cpp Use makeArrayRef insted of calling ArrayRef<T> constructor directly. I introduced most of these recently. 2014-04-30 07:17:30 +00:00
SystemZISelLowering.h [SystemZ] Move sign_extend optimization to PerformDAGCombine 2014-03-07 11:34:35 +00:00
SystemZLongBranch.cpp [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. 2014-04-29 07:58:41 +00:00
SystemZMachineFunctionInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
SystemZMachineFunctionInfo.h [SystemZ] Update namespace formatting to match current guidelines 2014-03-06 10:38:30 +00:00
SystemZMCInstLower.cpp Move the llvm mangler to lib/IR. 2014-01-07 21:19:40 +00:00
SystemZMCInstLower.h Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
SystemZOperands.td [SystemZ] Improve handling of PC-relative addresses 2013-09-27 15:14:04 +00:00
SystemZOperators.td [SystemZ] Use "auto" for cast results 2014-03-06 11:22:58 +00:00
SystemZPatterns.td [SystemZ] Use LOAD AND TEST for comparisons with -0 2013-12-06 09:59:12 +00:00
SystemZProcessors.td [SystemZ] Use interlocked-access 1 instructions for CodeGen 2013-12-24 15:18:04 +00:00
SystemZRegisterInfo.cpp [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some 2014-04-22 02:03:14 +00:00
SystemZRegisterInfo.h [C++] Use 'nullptr'. 2014-04-28 04:05:08 +00:00
SystemZRegisterInfo.td [SystemZ] Use upper words of GR64s for codegen 2013-10-01 11:26:28 +00:00
SystemZSelectionDAGInfo.cpp Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>. 2014-04-26 18:35:24 +00:00
SystemZSelectionDAGInfo.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZShortenInst.cpp [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. 2014-04-29 07:58:41 +00:00
SystemZSubtarget.cpp [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some 2014-04-22 02:03:14 +00:00
SystemZSubtarget.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZTargetMachine.cpp [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00
SystemZTargetMachine.h [SystemZ] Remove "virtual" from override methods 2014-03-06 12:03:36 +00:00

//===---------------------------------------------------------------------===//
// Random notes about and ideas for the SystemZ backend.
//===---------------------------------------------------------------------===//

The initial backend is deliberately restricted to z10.  We should add support
for later architectures at some point.

--

SystemZDAGToDAGISel::SelectInlineAsmMemoryOperand() is passed "m" for all
inline asm memory constraints; it doesn't get to see the original constraint.
This means that it must conservatively treat all inline asm constraints
as the most restricted type, "R".

--

If an inline asm ties an i32 "r" result to an i64 input, the input
will be treated as an i32, leaving the upper bits uninitialised.
For example:

define void @f4(i32 *%dst) {
  %val = call i32 asm "blah $0", "=r,0" (i64 103)
  store i32 %val, i32 *%dst
  ret void
}

from CodeGen/SystemZ/asm-09.ll will use LHI rather than LGHI.
to load 103.  This seems to be a general target-independent problem.

--

The tuning of the choice between LOAD ADDRESS (LA) and addition in
SystemZISelDAGToDAG.cpp is suspect.  It should be tweaked based on
performance measurements.

--

There is no scheduling support.

--

We don't use the BRANCH ON INDEX instructions.

--

We might want to use BRANCH ON CONDITION for conditional indirect calls
and conditional returns.

--

We don't use the TEST DATA CLASS instructions.

--

We could use the generic floating-point forms of LOAD COMPLEMENT,
LOAD NEGATIVE and LOAD POSITIVE in cases where we don't need the
condition codes.  For example, we could use LCDFR instead of LCDBR.

--

We only use MVC, XC and CLC for constant-length block operations.
We could extend them to variable-length operations too,
using EXECUTE RELATIVE LONG.

MVCIN, MVCLE and CLCLE may be worthwhile too.

--

We don't use CUSE or the TRANSLATE family of instructions for string
operations.  The TRANSLATE ones are probably more difficult to exploit.

--

We don't take full advantage of builtins like fabsl because the calling
conventions require f128s to be returned by invisible reference.

--

ADD LOGICAL WITH SIGNED IMMEDIATE could be useful when we need to
produce a carry.  SUBTRACT LOGICAL IMMEDIATE could be useful when we
need to produce a borrow.  (Note that there are no memory forms of
ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW, so the high
part of 128-bit memory operations would probably need to be done
via a register.)

--

We don't use the halfword forms of LOAD REVERSED and STORE REVERSED
(LRVH and STRVH).

--

We don't use ICM or STCM.

--

DAGCombiner doesn't yet fold truncations of extended loads.  Functions like:

    unsigned long f (unsigned long x, unsigned short *y)
    {
      return (x << 32) | *y;
    }

therefore end up as:

        sllg    %r2, %r2, 32
        llgh    %r0, 0(%r3)
        lr      %r2, %r0
        br      %r14

but truncating the load would give:

        sllg    %r2, %r2, 32
        lh      %r2, 0(%r3)
        br      %r14

--

Functions like:

define i64 @f1(i64 %a) {
  %and = and i64 %a, 1
  ret i64 %and
}

ought to be implemented as:

        lhi     %r0, 1
        ngr     %r2, %r0
        br      %r14

but two-address optimisations reverse the order of the AND and force:

        lhi     %r0, 1
        ngr     %r0, %r2
        lgr     %r2, %r0
        br      %r14

CodeGen/SystemZ/and-04.ll has several examples of this.

--

Out-of-range displacements are usually handled by loading the full
address into a register.  In many cases it would be better to create
an anchor point instead.  E.g. for:

define void @f4a(i128 *%aptr, i64 %base) {
  %addr = add i64 %base, 524288
  %bptr = inttoptr i64 %addr to i128 *
  %a = load volatile i128 *%aptr
  %b = load i128 *%bptr
  %add = add i128 %a, %b
  store i128 %add, i128 *%aptr
  ret void
}

(from CodeGen/SystemZ/int-add-08.ll) we load %base+524288 and %base+524296
into separate registers, rather than using %base+524288 as a base for both.

--

Dynamic stack allocations round the size to 8 bytes and then allocate
that rounded amount.  It would be simpler to subtract the unrounded
size from the copy of the stack pointer and then align the result.
See CodeGen/SystemZ/alloca-01.ll for an example.

--

If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.

--

We might want to model all access registers and use them to spill
32-bit values.