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llvm-6502/test/CodeGen/R600/rotl.ll
Matt Arsenault d344c6bcf9 R600/SI: Fix selection error on i64 rotl / rotr.
Evergreen is still broken due to missing shl_parts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 04:00:30 +00:00

55 lines
1.6 KiB
LLVM

; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: @rotl_i32:
; R600: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x
; R600-NEXT: 32
; R600: BIT_ALIGN_INT {{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}}
; SI: S_SUB_I32 [[SDST:s[0-9]+]], 32, {{[s][0-9]+}}
; SI: V_MOV_B32_e32 [[VDST:v[0-9]+]], [[SDST]]
; SI: V_ALIGNBIT_B32 {{v[0-9]+, [s][0-9]+, v[0-9]+}}, [[VDST]]
define void @rotl_i32(i32 addrspace(1)* %in, i32 %x, i32 %y) {
entry:
%0 = shl i32 %x, %y
%1 = sub i32 32, %y
%2 = lshr i32 %x, %1
%3 = or i32 %0, %2
store i32 %3, i32 addrspace(1)* %in
ret void
}
; FUNC-LABEL: @rotl_v2i32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
define void @rotl_v2i32(<2 x i32> addrspace(1)* %in, <2 x i32> %x, <2 x i32> %y) {
entry:
%0 = shl <2 x i32> %x, %y
%1 = sub <2 x i32> <i32 32, i32 32>, %y
%2 = lshr <2 x i32> %x, %1
%3 = or <2 x i32> %0, %2
store <2 x i32> %3, <2 x i32> addrspace(1)* %in
ret void
}
; FUNC-LABEL: @rotl_v4i32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
; SI: S_SUB_I32
; SI: V_ALIGNBIT_B32
define void @rotl_v4i32(<4 x i32> addrspace(1)* %in, <4 x i32> %x, <4 x i32> %y) {
entry:
%0 = shl <4 x i32> %x, %y
%1 = sub <4 x i32> <i32 32, i32 32, i32 32, i32 32>, %y
%2 = lshr <4 x i32> %x, %1
%3 = or <4 x i32> %0, %2
store <4 x i32> %3, <4 x i32> addrspace(1)* %in
ret void
}