llvm-6502/lib/Target/AArch64
Daniel Sanders 6d9e62f432 Make each target map all inline assembly memory constraints to InlineAsm::Constraint_m. NFC.
Summary:
This is instead of doing this in target independent code and is the last
non-functional change before targets begin to distinguish between
different memory constraints when selecting code for the ISD::INLINEASM
node.

Next, each target will individually move away from the idea that all
memory constraints behave like 'm'.

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8173


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232373 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 13:13:41 +00:00
..
AsmParser Make static variables const if possible. Makes them go into a read-only section. 2015-03-08 16:07:39 +00:00
Disassembler
InstPrinter
MCTargetDesc Remove the use of the subtarget in MCCodeEmitter creation and 2015-03-10 22:03:14 +00:00
TargetInfo
Utils Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64.h
AArch64.td
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp unique_ptrs are unique already, no need to unique them any further. 2015-03-13 16:59:29 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp [AArch64] Teach AsmPrinter about GlobalAddress operands. 2015-03-05 20:04:21 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64CollectLOH.cpp Constify AArch64CollectLOH.cpp. NFC 2015-03-11 21:40:25 +00:00
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp Have getCallPreservedMask and getThisCallPreservedMask take a 2015-03-11 22:42:13 +00:00
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64InstrInfo.h Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64InstrInfo.td [AArch64] Avoid going through GPRs for across-vector instructions. 2015-03-10 20:45:38 +00:00
AArch64ISelDAGToDAG.cpp Recommit r232027 with PR22883 fixed: Add infrastructure for support of multiple memory constraints. 2015-03-13 12:45:09 +00:00
AArch64ISelLowering.cpp Have getCallPreservedMask and getThisCallPreservedMask take a 2015-03-11 22:42:13 +00:00
AArch64ISelLowering.h Make each target map all inline assembly memory constraints to InlineAsm::Constraint_m. NFC. 2015-03-16 13:13:41 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. 2015-03-06 22:42:10 +00:00
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp Avoid copying LiveInterval, this could lead to a double-delete 2015-03-03 22:25:48 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp [AArch64] fix an invalid-iterator-use bug. 2015-03-02 00:17:18 +00:00
AArch64RegisterInfo.cpp Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64RegisterInfo.h Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Get the cached subtarget off the MachineFunction rather than 2015-02-20 08:39:06 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64Subtarget.h Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64TargetMachine.cpp Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64TargetMachine.h Migrate the AArch64 TargetRegisterInfo to its TargetMachine 2015-03-12 21:04:46 +00:00
AArch64TargetObjectFile.cpp [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [AArch64] Enable partial & runtime unrolling on cortex-a57 2015-03-09 06:14:28 +00:00
AArch64TargetTransformInfo.h
CMakeLists.txt
LLVMBuild.txt
Makefile