Anton Korobeynikov 652199961a The names of VFP variants of half-to-float conversion instructions were ... reversed. This leads to wrong codegen for float-to-half conversion intrinsics which are used to support storage-only fp16 type. NEON variants of same instructions are fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161907 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-14 23:36:01 +00:00
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ARM	The names of VFP variants of half-to-float conversion instructions were	2012-08-14 23:36:01 +00:00
CellSPU	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
CPP
Generic	The normal edge of an invoke is not allowed to branch to a block with a	2012-08-10 20:55:20 +00:00
Hexagon	[Hexagon] Don't mark callee saved registers as clobbered by a tail call	2012-08-13 19:54:01 +00:00
MBlaze
Mips	Don't modify MO while use_iterator is still pointing to it.	2012-08-09 22:08:24 +00:00
MSP430	Reapply r161633-161634 "Partition use lists so defs always come before uses.""	2012-08-10 00:21:30 +00:00
NVPTX
PowerPC	During the CodeGenPrepare we often lower intrinsics (such as objsize)	2012-08-14 05:19:07 +00:00
SPARC
Thumb
Thumb2	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
X86	fix PR11334	2012-08-14 21:24:47 +00:00
XCore