llvm-6502/lib/Target/R600/MCTargetDesc
Tom Stellard d275e025d2 R600/SI: Use RegisterOperands to specify which operands can accept immediates
There are some operands which can take either immediates or registers
and we were previously using different register class to distinguish
between operands that could take immediates and those that could not.

This patch switches to using RegisterOperands which should simplify the
backend by reducing the number of register classes and also make it
easier to implement the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225662 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 19:33:18 +00:00
..
AMDGPUAsmBackend.cpp Add r224985 back with two fixes. 2015-01-12 18:13:07 +00:00
AMDGPUELFObjectWriter.cpp
AMDGPUFixupKinds.h
AMDGPUMCAsmInfo.cpp
AMDGPUMCAsmInfo.h
AMDGPUMCCodeEmitter.cpp
AMDGPUMCCodeEmitter.h
AMDGPUMCTargetDesc.cpp R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00
AMDGPUMCTargetDesc.h R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile
R600MCCodeEmitter.cpp
SIMCCodeEmitter.cpp R600/SI: Use RegisterOperands to specify which operands can accept immediates 2015-01-12 19:33:18 +00:00