Evan Cheng 70955c2d12 Fix an obvious typo that's preventing x86 (32-bit) from using .literal16. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135535 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-19 23:14:32 +00:00
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Alpha
ARM	Fix a crash when building 177.mesa for armv6.	2011-07-18 18:47:13 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CellSPU	make the asmparser reject function and type redefinitions. 'Merging' hasn't been	2011-06-17 07:06:44 +00:00
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze	Add scheduling information for the MBlaze backend.	2011-04-11 22:31:52 +00:00
Mips	Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or	2011-07-19 20:34:00 +00:00
MSP430	Fix register-dependent test in MSP430.	2011-05-04 01:01:39 +00:00
PowerPC	FileCheck-ize a couple tests.	2011-07-18 21:23:42 +00:00
PTX	PTX: corrected tests that were failing	2011-06-25 19:41:17 +00:00
SPARC	make the asmparser reject function and type redefinitions. 'Merging' hasn't been	2011-06-17 07:06:44 +00:00
SystemZ
Thumb	Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.	2011-07-07 03:55:05 +00:00
Thumb2	Introduce MCCodeGenInfo, which keeps information that can affect codegen	2011-07-19 06:37:02 +00:00
X86	Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.	2011-07-19 23:14:32 +00:00
XCore	Add intrinsics for the zext / sext instructions.	2011-07-19 13:28:50 +00:00