Evan Cheng 9d709a8edb Enable machine cse of instructions which define physical registers. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-02 01:08:27 +00:00
..
Analysis
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	Enable machine cse of instructions which define physical registers.	2010-06-02 01:08:27 +00:00
DebugInfo	DwarfWrite is now smart enough to drop debug value pointing to undefined register. Update this test to avoid this.	2010-06-01 23:01:43 +00:00
ExecutionEngine
Feature	fix PR7105 by enumerating MDNodes on all @llvm.foo	2010-05-10 20:53:17 +00:00
FrontendAda
FrontendC	Add a test for the llvm-gcc commit in r90200.	2010-05-31 20:39:10 +00:00
FrontendC++	Revert 104841, 104842, 104876 due to buildbot failures. Radar 7424645.	2010-05-28 16:41:07 +00:00
FrontendFortran
FrontendObjC
FrontendObjC++
Integer
lib
Linker
LLVMC
MC	MC/X86: Add alias for movzx.	2010-05-28 21:20:21 +00:00
Other	Add lint checks for function attributes.	2010-05-28 21:43:57 +00:00
Scripts
TableGen
Transforms	Fix PR7272: when inlining through a callsite with byval arguments,	2010-05-31 21:00:26 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh