Daniel Sanders 3c380d5e28 [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v ... These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes, are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as a branch/mov sequence to evaluate to 0 or 1. Note: The resulting code is sub-optimal since it doesnt seem to be possible to feed the result of an intrinsic directly into a brcond. At the moment it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily evaluates the boolean twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189478 91177308-0d34-0410-b5e6-96231b3b80d8		2013-08-28 12:14:50 +00:00
..
AsmParser	[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.	2013-08-28 00:55:15 +00:00
Disassembler	[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.	2013-08-28 00:55:15 +00:00
InstPrinter	[micromips] Print instruction alias "not" if the last operand of a nor is zero.	2013-08-21 01:18:46 +00:00
MCTargetDesc	Changed comment	2013-08-27 19:45:28 +00:00
TargetInfo
CMakeLists.txt	Turn MipsOptimizeMathLibCalls into a target-independent scalar transform	2013-08-23 10:27:02 +00:00
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td	[Mips] Support for unaligned load/store microMips instructions	2013-08-13 20:19:16 +00:00
MicroMipsInstrInfo.td	[mips] Resolve register classes dynamically using ptr_rc to reduce the number of	2013-08-20 21:08:22 +00:00
Mips16FrameLowering.cpp	Add the saving of S2. This is needed for some of the floating point	2013-08-04 23:56:53 +00:00
Mips16FrameLowering.h
Mips16HardFloat.cpp	Start to add the LLVM builtins to the mips16 exclusion lists for fp.	2013-08-25 02:40:25 +00:00
Mips16HardFloat.h
Mips16InstrFormats.td	Create a pattern for the "trap" instruction.	2013-08-07 04:00:26 +00:00
Mips16InstrInfo.cpp	Remove unused stdio.h includes	2013-08-18 08:29:51 +00:00
Mips16InstrInfo.h	Clean up code for Mips16 large frame handling.	2013-08-04 01:13:25 +00:00
Mips16InstrInfo.td	[mips] Rename HIRegs and LORegs.	2013-08-14 00:47:08 +00:00
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp	Add another intrinsic that LLVM gives an incorrect prototype to.	2013-08-09 21:33:41 +00:00
Mips16ISelLowering.h
Mips16RegisterInfo.cpp	Clean up code for Mips16 large frame handling.	2013-08-04 01:13:25 +00:00
Mips16RegisterInfo.h
Mips64InstrInfo.td	[mips] Clean up definitions of move word from/to coprocessor instructions.	2013-08-28 00:42:50 +00:00
Mips.h	Turn MipsOptimizeMathLibCalls into a target-independent scalar transform	2013-08-23 10:27:02 +00:00
Mips.td	[Mips][msa] Added initial MSA support.	2013-08-13 20:54:07 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	[mips] Rename register classes CPURegs and CPU64Regs.	2013-08-06 23:08:38 +00:00
MipsAsmPrinter.h
MipsCallingConv.td	[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the	2013-08-20 23:38:40 +00:00
MipsCodeEmitter.cpp	[Mips] Support for unaligned load/store microMips instructions	2013-08-13 20:19:16 +00:00
MipsCondMov.td	[mips] Fix instruction definitions that were incorrectly marked as code-gen-only.	2013-08-19 19:08:03 +00:00
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td	[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.	2013-08-28 00:55:15 +00:00
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	This patch implements trap instructions for mips. The test cases are added.	2013-08-26 10:02:40 +00:00
MipsInstrFPU.td	[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.	2013-08-28 00:55:15 +00:00
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td	[mips][msa] Added load/store intrinsics.	2013-08-28 12:04:29 +00:00
MipsISelDAGToDAG.cpp	[mips][msa] Added load/store intrinsics.	2013-08-28 12:04:29 +00:00
MipsISelDAGToDAG.h	[mips][msa] Added load/store intrinsics.	2013-08-28 12:04:29 +00:00
MipsISelLowering.cpp	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsISelLowering.h	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsJITInfo.cpp	[test commit] Minor comment change.	2013-07-24 13:02:35 +00:00
MipsJITInfo.h
MipsLongBranch.cpp
MipsMachineFunction.cpp	[mips] Rename register classes CPURegs and CPU64Regs.	2013-08-06 23:08:38 +00:00
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsMSAInstrFormats.td	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsMSAInstrInfo.td	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsOs16.cpp	Add an option which permits the user to specify using a bitmask, that various	2013-08-20 20:53:09 +00:00
MipsOs16.h
MipsRegisterInfo.cpp	[mips][msa] Added cfcmsa, and ctcmsa	2013-08-28 10:26:24 +00:00
MipsRegisterInfo.h	[mips] Resolve register classes dynamically using ptr_rc to reduce the number of	2013-08-20 21:08:22 +00:00
MipsRegisterInfo.td	[mips][msa] Added cfcmsa, and ctcmsa	2013-08-28 10:26:24 +00:00
MipsRelocations.h
MipsSchedule.td	[mips] Define instruction itineraries IIArith and IILogic.	2013-07-31 00:55:34 +00:00
MipsSEFrameLowering.cpp	[mips] Define register class FGRH32 for the high half of the 64-bit floating	2013-08-20 22:58:56 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips][msa] Added cfcmsa, and ctcmsa	2013-08-28 10:26:24 +00:00
MipsSEInstrInfo.h	[mips] Add support for mfhc1 and mthc1.	2013-08-20 23:47:25 +00:00
MipsSEISelDAGToDAG.cpp	[mips][msa] Added load/store intrinsics.	2013-08-28 12:04:29 +00:00
MipsSEISelDAGToDAG.h	[mips][msa] Added load/store intrinsics.	2013-08-28 12:04:29 +00:00
MipsSEISelLowering.cpp	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsSEISelLowering.h	[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v	2013-08-28 12:14:50 +00:00
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp	[mips] Rename register classes CPURegs and CPU64Regs.	2013-08-06 23:08:38 +00:00
MipsSERegisterInfo.h
MipsSubtarget.cpp	Fix a subtle difference between running clang vs llc for mips16.	2013-08-16 23:05:18 +00:00
MipsSubtarget.h	[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the	2013-08-20 23:38:40 +00:00
MipsTargetMachine.cpp	Turn MipsOptimizeMathLibCalls into a target-independent scalar transform	2013-08-23 10:27:02 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h