llvm-6502/lib
James Molloy 737c2ac4fc [ARM64-BE] Implement the crazy bitcast handling for big endian vectors.
Because we've canonicalised on using LD1/ST1, every time we do a bitcast
between vector types we must do an equivalent lane reversal.

Consider a simple memory load followed by a bitconvert then a store.
  v0 = load v2i32
  v1 = BITCAST v2i32 v0 to v4i16
       store v4i16 v2

In big endian mode every memory access has an implicit byte swap. LDR and
STR do a 64-bit byte swap, whereas LD1/ST1 do a byte swap per lane - that
is, they treat the vector as a sequence of elements to be byte-swapped.
The two pairs of instructions are fundamentally incompatible. We've decided
to use LD1/ST1 only to simplify compiler implementation.

LD1/ST1 perform the equivalent of a sequence of LDR/STR + REV. This makes
the original code sequence:  v0 = load v2i32

  v1 = REV v2i32                  (implicit)
  v2 = BITCAST v2i32 v1 to v4i16
  v3 = REV v4i16 v2               (implicit)
       store v4i16 v3

But this is now broken - the value stored is different to the value loaded
due to lane reordering. To fix this, on every BITCAST we must perform two
other REVs:

  v0 = load v2i32
  v1 = REV v2i32                  (implicit)
  v2 = REV v2i32
  v3 = BITCAST v2i32 v2 to v4i16
  v4 = REV v4i16
  v5 = REV v4i16 v4               (implicit)
       store v4i16 v5

This means an extra two instructions, but actually in most cases the two REV
instructions can be combined into one. For example:
  (REV64_2s (REV64_4h X)) === (REV32_4h X)

There is also no 128-bit REV instruction. This must be synthesized with an
EXT instruction.

Most bitconverts require some sort of conversion. The only exceptions are:
  a) Identity conversions -  vNfX <-> vNiX
  b) Single-lane-to-scalar - v1fX <-> fX or v1iX <-> iX

Even though there are hundreds of changed lines, I have a fairly high confidence
that they are somewhat correct. The changes to add two REV instructions per
bitcast were pretty mechanical, and once I'd done that I threw the resulting
.td at a script I wrote which combined the two REVs together (and added
an EXT instruction, for f128) based on an instruction description I gave it.

This was much less prone to error than doing it all manually, plus my brain
would not just have melted but would have vapourised.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208194 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-07 11:28:53 +00:00
..
Analysis [C++11] Add NArySCEV->Operands iterator range 2014-05-07 06:07:47 +00:00
AsmParser Add 'musttail' marker to call instructions 2014-04-24 20:14:34 +00:00
Bitcode [IR] Make {extract,insert}element accept an index of any integer type. 2014-05-01 22:12:39 +00:00
CodeGen [BUG][REFACTOR] 2014-05-07 09:51:22 +00:00
DebugInfo [DWARF parser] Cleanup code in DWARFDebugLine. 2014-04-30 00:09:19 +00:00
ExecutionEngine [ARM64] Try and make the ELF MCJIT *slightly* less broken for ARM64. 2014-04-30 10:15:41 +00:00
IR [BUG][REFACTOR] 2014-05-07 09:51:22 +00:00
IRReader [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. 2014-04-15 06:32:26 +00:00
LineEditor [CMake] Use LINK_LIBS instead of target_link_libraries(). 2014-02-26 06:41:29 +00:00
Linker Be more strict about not calling setAlignment on global aliases. 2014-05-06 14:51:36 +00:00
LTO Use a range loop. 2014-05-05 20:06:41 +00:00
MC Allow using normal .eh_frame based unwinding on ARM. Use the same 2014-05-07 07:49:34 +00:00
Object [ELFYAML] Group ELF header falgs to target specific blocks. Handle flags 2014-05-03 11:39:50 +00:00
Option Protect the ArgList dtor 2014-04-20 23:59:00 +00:00
ProfileData Fixing a cast-qual warning. getBufferStart() and getBufferEnd() both return a const char *, so casting to non-const was triggering a warning (even though the assignment and usage was always const anyway). 2014-05-01 17:16:24 +00:00
Support [Support/MemoryBuffer] Remove the assertion that the file size did not shrink. 2014-05-06 23:30:56 +00:00
TableGen [tablegen] Add !listconcat operator with the similar semantics as !strconcat 2014-05-07 10:13:19 +00:00
Target [ARM64-BE] Implement the crazy bitcast handling for big endian vectors. 2014-05-07 11:28:53 +00:00
Transforms MergeFunctions Pass, introduced total ordering among values. 2014-05-07 11:11:39 +00:00
CMakeLists.txt ProfileData: Introduce the InstrProfReader interface and a text reader 2014-03-21 17:24:48 +00:00
LLVMBuild.txt ProfileData: Introduce the InstrProfReader interface and a text reader 2014-03-21 17:24:48 +00:00
Makefile ProfileData: Introduce the InstrProfReader interface and a text reader 2014-03-21 17:24:48 +00:00