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14ea1ec232
by inserting explicit zero extensions where necessary. Included is a testcase where SelectionDAG produces a virtual register holding an i1 value which FastISel previously mistakenly assumed to be zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
474 B
LLVM
20 lines
474 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 -fast-isel | grep {andb \$1, %}
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declare i64 @bar(i64)
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define i32 @foo(i64 %x) nounwind {
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%y = add i64 %x, -3 ; <i64> [#uses=1]
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%t = call i64 @bar(i64 %y) ; <i64> [#uses=1]
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%s = mul i64 %t, 77 ; <i64> [#uses=1]
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%z = trunc i64 %s to i1 ; <i1> [#uses=1]
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br label %next
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next: ; preds = %0
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%u = zext i1 %z to i32 ; <i32> [#uses=1]
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%v = add i32 %u, 1999 ; <i32> [#uses=1]
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br label %exit
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exit: ; preds = %next
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ret i32 %v
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}
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