llvm-6502/lib/Target/CellSPU
2009-11-05 18:47:09 +00:00
..
AsmPrinter Remove includes of Support/Compiler.h that are no longer needed after the 2009-10-25 06:57:41 +00:00
TargetInfo Factor commonality in triple match routines into helper template for registering 2009-07-26 05:03:33 +00:00
CellSDKIntrinsics.td
CMakeLists.txt Normalize makefile comments and sort cmake file lists. 2009-08-31 13:05:24 +00:00
Makefile Add TargetInfo libraries for all targets. 2009-07-15 06:35:19 +00:00
README.txt
SPU64InstrInfo.td
SPU128InstrInfo.td
SPU.h Move DataTypes.h to include/llvm/System, update all users. This breaks the last 2009-10-26 01:35:46 +00:00
SPU.td
SPUCallingConv.td
SPUFrameInfo.cpp
SPUFrameInfo.h
SPUHazardRecognizers.cpp eliminate the last DOUTs from the targets. 2009-08-23 06:49:22 +00:00
SPUHazardRecognizers.h
SPUInstrBuilder.h
SPUInstrFormats.td
SPUInstrInfo.cpp Remove Streams.h from the targets. 2009-08-23 11:52:17 +00:00
SPUInstrInfo.h Remove unused member functions. 2009-07-24 07:43:59 +00:00
SPUInstrInfo.td Major calling convention code refactoring. 2009-08-05 01:29:28 +00:00
SPUISelDAGToDAG.cpp Remove uninteresting and confusing debug output. 2009-11-05 18:47:09 +00:00
SPUISelLowering.cpp Remove strange 'const' qualifiers, as warned about by icc 2009-09-06 12:16:26 +00:00
SPUISelLowering.h Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson. 2009-09-02 08:44:58 +00:00
SPUMachineFunction.h
SPUMathInstr.td
SPUMCAsmInfo.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
SPUMCAsmInfo.h Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
SPUNodes.td 128-bit sign extension and vector shift cleanups, contributed by Ken Werner 2009-08-24 22:28:53 +00:00
SPUOperands.td Split EVT into MVT and EVT, the former representing _just_ a primitive type, while 2009-08-11 20:47:22 +00:00
SPURegisterInfo.cpp Add register-reuse to frame-index register scavenging. When a target uses 2009-10-07 17:12:56 +00:00
SPURegisterInfo.h Add register-reuse to frame-index register scavenging. When a target uses 2009-10-07 17:12:56 +00:00
SPURegisterInfo.td
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
SPUSubtarget.h Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
SPUTargetMachine.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
SPUTargetMachine.h Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 2009-08-12 07:22:17 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: needed
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===