Venkatraman Govindaraju 8104690370 [Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199014 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-11 19:38:03 +00:00
..
AArch64	Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux.	2014-01-10 13:41:49 +00:00
ARM	Must not produce Tag_CPU_arch_profile for pre-ARMv7 cores (e.g. cortex-m0)	2014-01-10 16:42:55 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Remove a failing test to get the buildbots back to green.	2014-01-06 00:43:09 +00:00
Hexagon
Inputs
Mips	[Mips] Does not take in account 'use-soft-float' attribute's value when	2013-12-25 17:00:27 +00:00
MSP430
NVPTX	[NVPTX] Fix off-by-one error when creating the VT list for an SDNode	2013-12-05 12:58:00 +00:00
PowerPC	Implement initial-exec TLS for PPC32.	2013-12-20 18:08:54 +00:00
R600	R600: Allow ftrunc	2013-12-20 05:11:55 +00:00
SPARC	[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.	2014-01-11 19:38:03 +00:00
SystemZ	[SystemZ] Fix RNSBG bug introduced by r197802	2014-01-09 11:28:53 +00:00
Thumb	Correctly handle the degenerated triple "thumb".	2013-12-18 21:29:44 +00:00
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	llvm/test/CodeGen/X86/anyregcc.ll: Add explicit -mtriple=x86_64-unknown-unknown.	2014-01-11 09:23:44 +00:00
XCore	XCore Target: correct callee save register spilling when callsUnwindInit is true.	2014-01-06 14:21:12 +00:00