Jim Grosbach 74423e32ce ARM assemly parsing and validation of IT instruction. ... "Although a Thumb2 instruction, the IT mnemonic shall be permitted in ARM mode, and the condition verified to match the condition code(s) on the following instruction(s)." PR11853 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148969 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-25 19:52:01 +00:00
..
Analysis	Use precomputed BB size instead of BB->size().	2012-01-25 18:54:13 +00:00
Archive	Avoid using an invalidated iterator.	2012-01-23 05:07:16 +00:00
AsmParser	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
Bitcode	Extend Attributes to 64 bits	2012-01-20 17:56:17 +00:00
CodeGen	use ConstantVector::getSplat in a few places.	2012-01-25 06:02:56 +00:00
DebugInfo	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
ExecutionEngine	add more support for ConstantDataSequential	2012-01-24 13:41:11 +00:00
Linker	use Constant::getAggregateElement to simplify a bunch of code.	2012-01-25 06:48:06 +00:00
MC	ARM Darwin symbol ref differences w/o subsection-via-symbols.	2012-01-24 21:45:25 +00:00
Object	Sink assert-only variables into the asserts	2012-01-24 19:43:30 +00:00
Support	Remove dead default.	2012-01-23 22:37:11 +00:00
TableGen	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
Target	ARM assemly parsing and validation of IT instruction.	2012-01-25 19:52:01 +00:00
Transforms	Gracefully degrade precision in branch probability numbers.	2012-01-25 09:43:14 +00:00
VMCore	constify some methods and add a new Constant::getAggregateElement	2012-01-25 06:16:32 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile