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CallingConvLower.cpp
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Add "inreg" field to CallSDNode (doesn't increase
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2008-09-26 19:31:26 +00:00 |
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CMakeLists.txt
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Experimental post-pass scheduling support. Post-pass scheduling
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2008-11-19 23:18:57 +00:00 |
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DAGCombiner.cpp
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Fold x-0 to x in unsafe-fp-math mode. This comes up in the
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2009-01-23 19:10:37 +00:00 |
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FastISel.cpp
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Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
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2009-01-22 09:10:11 +00:00 |
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LegalizeDAG.cpp
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Fix an indent and a typo.
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2009-01-24 22:12:48 +00:00 |
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LegalizeFloatTypes.cpp
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Cleanup whitespace and comments, and tweak some
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2009-01-21 09:00:29 +00:00 |
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LegalizeIntegerTypes.cpp
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Cleanup whitespace and comments, and tweak some
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2009-01-21 09:00:29 +00:00 |
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LegalizeTypes.cpp
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Cleanup whitespace and comments, and tweak some
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2009-01-21 09:00:29 +00:00 |
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LegalizeTypes.h
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Cleanup whitespace and comments, and tweak some
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2009-01-21 09:00:29 +00:00 |
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LegalizeTypesGeneric.cpp
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Preserve SourceValue information when lowering produces multiple loads from
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2008-12-16 18:25:36 +00:00 |
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LegalizeVectorTypes.cpp
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Added missing support to widen an operand from a bit convert.
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2009-01-15 22:43:38 +00:00 |
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Makefile
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Removed trailing whitespace from Makefiles.
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2009-01-09 16:44:42 +00:00 |
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ScheduleDAGFast.cpp
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Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
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2009-01-15 19:20:50 +00:00 |
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ScheduleDAGList.cpp
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Initial hazard recognizer support in post-pass scheduling. This includes
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2009-01-16 01:33:36 +00:00 |
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ScheduleDAGRRList.cpp
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Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
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2009-01-15 19:20:50 +00:00 |
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ScheduleDAGSDNodes.cpp
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CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
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2009-01-16 20:57:18 +00:00 |
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ScheduleDAGSDNodesEmit.cpp
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Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
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2009-01-22 09:10:11 +00:00 |
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SelectionDAG.cpp
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Whitespace tidiments.
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2009-01-25 16:21:38 +00:00 |
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SelectionDAGBuild.cpp
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Cleanup whitespace and comments, and tweak some
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2009-01-21 09:00:29 +00:00 |
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SelectionDAGBuild.h
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Initial checkin of APInt'ififcation of switch lowering
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2008-12-23 22:25:27 +00:00 |
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SelectionDAGISel.cpp
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Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
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2009-01-20 19:12:24 +00:00 |
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SelectionDAGPrinter.cpp
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Use DebugInfo interface to lower dbg_* intrinsics.
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2009-01-13 00:35:13 +00:00 |
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TargetLowering.cpp
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Add SelectionDAG::getNOT method to construct bitwise NOT operations,
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2009-01-22 17:39:32 +00:00 |
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