llvm-6502/test/CodeGen
Juergen Ributzka 7516444a26 [FastISel][AArch64] Custom lower sdiv by power-of-2.
Emit an optimized instruction sequence for sdiv by power-of-2 depending on the
exact flag.

This fixes rdar://problem/18224511.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-17 21:55:55 +00:00
..
AArch64 [FastISel][AArch64] Custom lower sdiv by power-of-2. 2014-09-17 21:55:55 +00:00
ARM Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors" 2014-09-17 18:09:13 +00:00
CPP
Generic Add a regression test to sanity check the PBQP allocator. 2014-09-03 18:04:10 +00:00
Hexagon
Inputs
Mips Add mips32 r1 to the list of supported targets for Mips fast-isel 2014-09-15 20:30:25 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX [MachineSink] Use the real post dominator tree 2014-09-01 03:47:25 +00:00
PowerPC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
R600 Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Check-label a bit more specific 2014-09-03 13:32:08 +00:00
Thumb2 ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
X86 [x32] Fix function indirect calls 2014-09-17 07:09:23 +00:00
XCore