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https://github.com/c64scene-ar/llvm-6502.git
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e5af2d3a22
dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
775 B
LLVM
26 lines
775 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 > %t
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; RUN: grep btl %t | count 2
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; RUN: grep cmov %t | count 2
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; RUN: not grep test %t
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; RUN: not grep set %t
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; RUN: not grep j %t
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; RUN: not grep cmovne %t
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; RUN: not grep cmove %t
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define i32 @foo(i32 %x, i32 %n, i32 %w, i32 %v) nounwind readnone {
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entry:
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%0 = lshr i32 %x, %n ; <i32> [#uses=1]
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%1 = and i32 %0, 1 ; <i32> [#uses=1]
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%toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
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%.0 = select i1 %toBool, i32 %v, i32 12 ; <i32> [#uses=1]
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ret i32 %.0
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}
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define i32 @bar(i32 %x, i32 %n, i32 %w, i32 %v) nounwind readnone {
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entry:
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%0 = lshr i32 %x, %n ; <i32> [#uses=1]
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%1 = and i32 %0, 1 ; <i32> [#uses=1]
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%toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
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%.0 = select i1 %toBool, i32 12, i32 %v ; <i32> [#uses=1]
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ret i32 %.0
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}
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