llvm-6502/test/CodeGen
Chad Rosier 7590022f40 Generate an error message instead of asserting or segfaulting when we can't
handle indirect register inputs.
rdar://13322011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 19:12:05 +00:00
..
AArch64 AArch64: be more careful resorting to inefficient addressing for weak vars. 2013-02-28 14:36:31 +00:00
ARM Generate an error message instead of asserting or segfaulting when we can't 2013-03-01 19:12:05 +00:00
CPP
Generic
Hexagon Hexagon: Add constant extender support framework. 2013-03-01 17:37:13 +00:00
MBlaze
Mips [mips] Remove unused option. Fix 80-column violations. 2013-03-01 02:17:02 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Fix PR15332 (patch by Florian Zeitz). 2013-02-26 21:28:57 +00:00
R600 R600/SI: fix sampler tests after fixing wait insertions 2013-03-01 17:39:05 +00:00
SI
SPARC
Thumb Fix thumbv5e frame lowering assertion failure. 2013-02-20 12:21:33 +00:00
Thumb2 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
X86 Fix PR10475 2013-03-01 18:40:30 +00:00
XCore