llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-12 17:32:19 +00:00

History

Bob Wilson 75f0288b7d Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64

value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8

2010-09-17 22:59:05 +00:00

Alpha

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ARM

Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64

2010-09-17 22:59:05 +00:00

Blackfin

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CBackend

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CellSPU

Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.