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76afdc9a80
llvm-6502/lib/Target/Sparc
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Chris Lattner 76afdc9a80 First step towards V9 instructions in the V8 backend, two conditional move 
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25809 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:35:57 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
Makefile Add trivial subtarget support 2006-01-26 06:51:21 +00:00
README.txt First step towards V9 instructions in the V8 backend, two conditional move 2006-01-30 05:35:57 +00:00
Sparc.h remove the V8 simple isel 2006-01-23 07:20:15 +00:00
Sparc.td Subtarget feature can now set any variable to any value 2006-01-27 08:09:42 +00:00
SparcAsmPrinter.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
SparcInstrFormats.td Push ops list, asm string, and pattern all the way up to InstV8. Move the 2005-12-18 08:21:00 +00:00
SparcInstrInfo.cpp Tighten up some checks 2005-12-18 06:40:34 +00:00
SparcInstrInfo.h
SparcInstrInfo.td First step towards V9 instructions in the V8 backend, two conditional move 2006-01-30 05:35:57 +00:00
SparcISelDAGToDAG.cpp First step towards V9 instructions in the V8 backend, two conditional move 2006-01-30 05:35:57 +00:00
SparcRegisterInfo.cpp New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
SparcRegisterInfo.h Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcRegisterInfo.td Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcSubtarget.cpp Two changes: 2006-01-30 04:57:43 +00:00
SparcSubtarget.h Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcTargetMachine.cpp Add trivial subtarget support 2006-01-26 06:51:21 +00:00
SparcTargetMachine.h Add trivial subtarget support 2006-01-26 06:51:21 +00:00

README.txt 

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].