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llvm-6502/lib/Target/Alpha
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Dan Gohman 9911405183 Convert Alpha and Mips to use a MachineFunctionInfo subclass to 
carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 20:30:14 +00:00
..
AsmPrinter Rename PaddedSize to AllocSize, in the hope that this 2009-05-09 07:06:46 +00:00
Alpha.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
Alpha.td Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 2008-11-24 07:34:46 +00:00
AlphaBranchSelector.cpp Tidy up several unbeseeming casts from pointer to intptr_t. 2008-09-04 17:05:41 +00:00
AlphaCodeEmitter.cpp Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 2009-06-01 19:57:37 +00:00
AlphaInstrFormats.td Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 2008-12-03 18:15:48 +00:00
AlphaInstrInfo.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaInstrInfo.h Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaInstrInfo.td Add an int64_t variant of abs, for host environments 2009-05-13 00:24:22 +00:00
AlphaISelDAGToDAG.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaISelLowering.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaISelLowering.h Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing 2009-02-07 16:15:20 +00:00
AlphaJITInfo.cpp First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaJITInfo.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaLLRP.cpp Remove non-DebugLoc versions of BuildMI from Alpha and Cell. 2009-02-13 02:30:42 +00:00
AlphaMachineFunctionInfo.h Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaRegisterInfo.cpp Propagate debug loc info through prologue/epilogue. 2009-02-23 00:42:30 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h Propagate CPU string out of SubtargetFeatures 2009-05-23 19:50:50 +00:00
AlphaTargetAsmInfo.cpp Alpha always requires global relocations to be r/w regardless of PIC. 2009-03-29 17:14:14 +00:00
AlphaTargetAsmInfo.h Alpha always requires global relocations to be r/w regardless of PIC. 2009-03-29 17:14:14 +00:00
AlphaTargetMachine.cpp First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaTargetMachine.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
CMakeLists.txt CMake: corrected split of Alpha and Sparc AsmPrinters. 2008-11-11 17:10:13 +00:00
Makefile Removed trailing whitespace from Makefiles. 2009-01-09 16:44:42 +00:00
README.txt

README.txt 

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html