Hal Finkel 77838f9ca9 Enable generating PPC pre-increment (r+imm) instructions by default. ... It seems that this no longer causes test suite failures on PPC64 (after r157159), and often gives a performance benefit, so it can be enabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157911 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-04 02:21:00 +00:00
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ARM	ARM: add testing case for struct byval	2012-06-02 05:37:44 +00:00
CellSPU
CPP
Generic
Hexagon
MBlaze
Mips	Add another test case which tests Mips' unaligned load/store instructions.	2012-06-02 01:13:10 +00:00
MSP430
NVPTX
PowerPC	Enable generating PPC pre-increment (r+imm) instructions by default.	2012-06-04 02:21:00 +00:00
SPARC
Thumb
Thumb2
X86	Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.	2012-06-03 18:58:46 +00:00
XCore