llvm-6502/lib/Target/AArch64
Juergen Ributzka 06bb1ca1e0 Reapply [FastISel][AArch64] Add support for more addressing modes (r215597).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.

Original commit message:
FastISel didn't take much advantage of the different addressing modes available
to it on AArch64. This commit allows the ComputeAddress method to recognize more
addressing modes that allows shifts and sign-/zero-extensions to be folded into
the memory operation itself.

For Example:
  lsl x1, x1, #3     --> ldr x0, [x0, x1, lsl #3]
  ldr x0, [x0, x1]

  sxtw x1, w1
  lsl x1, x1, #3     --> ldr x0, [x0, x1, sxtw #3]
  ldr x0, [x0, x1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216013 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 19:44:17 +00:00
..
AsmParser TableGen: allow use of uint64_t for available features mask. 2014-08-18 11:49:42 +00:00
Disassembler Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
InstPrinter Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
MCTargetDesc Remove HasLEB128. 2014-08-15 14:01:07 +00:00
TargetInfo AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
Utils Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64.td [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
AArch64A57FPLoadBalancing.cpp AArch64: avoid deleting the current iterator in a loop. 2014-08-08 17:31:52 +00:00
AArch64AddressTypePromotion.cpp Fix typos in comments 2014-08-15 22:17:28 +00:00
AArch64AdvSIMDScalarPass.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64AsmPrinter.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64BranchRelaxation.cpp Testing commit access. 2014-08-14 16:20:50 +00:00
AArch64CallingConvention.td Remove the target machine from CCState. Previously it was only used 2014-08-06 18:45:26 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64CollectLOH.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64ConditionalCompares.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64ExpandPseudoInsts.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64FastISel.cpp Reapply [FastISel][AArch64] Add support for more addressing modes (r215597). 2014-08-19 19:44:17 +00:00
AArch64FrameLowering.cpp Fix typos: 2014-08-11 18:04:46 +00:00
AArch64FrameLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64InstrAtomics.td Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends 2014-08-18 16:48:58 +00:00
AArch64InstrFormats.td [AArch64] Fix registerAllocator assigns same register for base and wback in 2014-08-11 21:39:53 +00:00
AArch64InstrInfo.cpp [MachineCombiner] Removal of dangling DBG_VALUES after combining [20598] 2014-08-13 22:07:36 +00:00
AArch64InstrInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64InstrInfo.td [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file. 2014-07-24 01:29:59 +00:00
AArch64ISelDAGToDAG.cpp [AArch64] Unsized types don't specify an alignment. 2014-06-30 15:03:00 +00:00
AArch64ISelLowering.cpp Hide two different AlignMode enums in anonymous namespaces. This bug is reported by UBSan. 2014-08-19 18:40:39 +00:00
AArch64ISelLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64LoadStoreOptimizer.cpp Add missing closing namespace comment. 2014-08-11 22:42:31 +00:00
AArch64MachineCombinerPattern.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MCInstLower.cpp Replace some assert(0)'s with llvm_unreachable. 2014-06-18 05:05:13 +00:00
AArch64MCInstLower.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PerfectShuffle.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PromoteConstant.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64RegisterInfo.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64RegisterInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
AArch64SchedA57WriteRes.td [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64SelectionDAGInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64StorePairSuppress.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64Subtarget.cpp
AArch64Subtarget.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64TargetMachine.cpp [AArch64] Add an FP load balancing pass for Cortex-A57 2014-08-08 12:33:21 +00:00
AArch64TargetMachine.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64TargetTransformInfo.cpp Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost. 2014-08-05 12:30:34 +00:00
CMakeLists.txt [AArch64] Add an FP load balancing pass for Cortex-A57 2014-08-08 12:33:21 +00:00
LLVMBuild.txt Prune redundant libdeps. 2014-07-24 11:45:27 +00:00
Makefile