Jack Carter a0f14afee1 Mips specific inline asm operand modifier 'M': ... Print the high order register of a double word register operand. In 32 bit mode, a 64 bit double word integer will be represented by 2 32 bit registers. This modifier causes the high order register to be used in the asm expression. It is useful if you are using doubles in assembler and continue to control register to variable relationships. This patch also fixes a related bug in a previous patch: case 'D': // Second part of a double word register operand case 'L': // Low order register of a double word register operand case 'M': // High order register of a double word register operand I got 'D' and 'M' confused. The second part of a double word operand will only match 'M' for one of the endianesses. I had 'L' and 'D' be the opposite twins when 'L' and 'M' are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160429 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-18 06:41:36 +00:00
..
AsmParser
Disassembler
InstPrinter
MCTargetDesc	The Mips specific relocation R_MIPS_GOT_DISP	2012-07-13 19:15:47 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
Mips16InstrFormats.td	Clean up Mips16InstrFormats.td and Mips16InstrInfo.td.	2012-07-17 22:55:34 +00:00
Mips16InstrInfo.td	Clean up Mips16InstrFormats.td and Mips16InstrInfo.td.	2012-07-17 22:55:34 +00:00
Mips64InstrInfo.td	Doubleword Shift Left Logical Plus 32	2012-07-16 15:14:51 +00:00
Mips.h
Mips.td
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	Mips specific inline asm operand modifier 'M':	2012-07-18 06:41:36 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp
MipsCondMov.td
MipsDelaySlotFiller.cpp
MipsFrameLowering.cpp	Lower RETURNADDR node in Mips backend.	2012-07-11 00:53:32 +00:00
MipsFrameLowering.h
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td	Remove variable_ops from call instructions in most targets.	2012-07-13 20:44:29 +00:00
MipsISelDAGToDAG.cpp
MipsISelLowering.cpp	Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.	2012-07-11 19:32:27 +00:00
MipsISelLowering.h	Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.	2012-07-11 19:32:27 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp	Doubleword Shift Left Logical Plus 32	2012-07-16 15:14:51 +00:00
MipsMCInstLower.h	Doubleword Shift Left Logical Plus 32	2012-07-16 15:14:51 +00:00
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td	In register classes in MipsRegisterInfo.td, list the registers in ascending	2012-07-11 20:51:50 +00:00
MipsRelocations.h
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h