llvm-6502/test/CodeGen
Bill Schmidt 792b123338 This patch fixes the PPC calling convention to handle returns of
_Complex float and _Complex long double, by simply increasing the
number of floating point registers available for return values.

The test case verifies that the correct registers are loaded.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 17:45:19 +00:00
..
ARM Simplify writing floating types to assembly. 2013-01-11 10:36:13 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon
MBlaze
Mips [mips] MipsTargetLowering::getSetCCResultType should return a vector type if 2013-01-04 20:06:01 +00:00
MSP430
NVPTX
PowerPC This patch fixes the PPC calling convention to handle returns of 2013-01-17 17:45:19 +00:00
R600 DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 2013-01-02 22:13:01 +00:00
SI
SPARC
Thumb
Thumb2 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 2012-12-20 19:59:30 +00:00
X86 Optimization for the following SIGN_EXTEND pairs: 2013-01-17 09:59:53 +00:00
XCore