llvm-6502/test/CodeGen
2015-06-16 08:39:27 +00:00
..
AArch64 [AArch64] Generalize extract-high DUP extension to MOVI/MVNI. 2015-06-16 01:18:14 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM [ARM] Disabling vfp4 should disable fp16 2015-06-12 09:38:51 +00:00
BPF
CPP
Generic
Hexagon [Hexagon] Using readobj rather than objdump. 2015-06-15 21:57:41 +00:00
Inputs
Mips
MIR Disable llvm/test/CodeGen/MIR/machine-function.mir on x86 msc18 for now. Investigating. 2015-06-16 06:57:35 +00:00
MSP430
NVPTX Revert 239795 2015-06-16 01:20:53 +00:00
PowerPC
SPARC
SystemZ
Thumb
Thumb2
WinEH
X86 [AVX512] add integer min/max intrinsics support. 2015-06-16 08:39:27 +00:00
XCore