Devang Patel 7c64fe651a Intel syntax: Parse segment registers. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148712 91177308-0d34-0410-b5e6-96231b3b80d8

2012-01-23 18:31:58 +00:00

..

Analysis

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

Archive

Avoid using an invalidated iterator.

2012-01-23 05:07:16 +00:00

AsmParser

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

Bitcode

Extend Attributes to 64 bits

2012-01-20 17:56:17 +00:00

CodeGen

An option to selectively enable parts of ARM EHABI support.

2012-01-23 07:57:39 +00:00

DebugInfo

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

ExecutionEngine

Split the lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h header to smaller logical headers.

2012-01-22 07:05:02 +00:00

Linker

The iteration order over a std::set<Module*> depends on the addresses of the

2012-01-23 03:41:53 +00:00

MC

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

Object

Remove trailing spaces

2012-01-22 09:02:48 +00:00

Support

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

TableGen

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

Target

Intel syntax: Parse segment registers.

2012-01-23 18:31:58 +00:00

Transforms

Implemented AddressSanitizer::getPassName()

2012-01-23 11:22:43 +00:00

VMCore

convert CAZ, UndefValue, and CPN to use DenseMap's again, this time without

2012-01-23 15:20:12 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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