Jakub Staszak 7cc2b07437 Introduce MachineBranchProbabilityInfo class, which has similar API to ...

BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8

2011-06-16 20:22:37 +00:00

..

CMakeLists.txt

…

DAGCombiner.cpp

Add a DAGCombine for (ext (binop (load x), cst)).

2011-06-16 01:15:49 +00:00

FastISel.cpp

…

FunctionLoweringInfo.cpp

…

InstrEmitter.cpp

Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.

2011-06-16 18:17:13 +00:00

InstrEmitter.h

…

LegalizeDAG.cpp

…

LegalizeFloatTypes.cpp

…

LegalizeIntegerTypes.cpp

…

LegalizeTypes.cpp

…

LegalizeTypes.h

…

LegalizeTypesGeneric.cpp

…

LegalizeVectorOps.cpp

…

LegalizeVectorTypes.cpp

…

Makefile

…

ScheduleDAGFast.cpp

…

ScheduleDAGList.cpp

…

ScheduleDAGRRList.cpp

Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.

2011-06-15 23:35:18 +00:00

ScheduleDAGSDNodes.cpp

…

ScheduleDAGSDNodes.h

Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.

2011-06-15 23:35:18 +00:00

SDNodeDbgValue.h

…

SDNodeOrdering.h

…

SelectionDAG.cpp

…

SelectionDAGBuilder.cpp

Introduce MachineBranchProbabilityInfo class, which has similar API to

2011-06-16 20:22:37 +00:00

SelectionDAGBuilder.h

Introduce MachineBranchProbabilityInfo class, which has similar API to

2011-06-16 20:22:37 +00:00

SelectionDAGISel.cpp

Introduce MachineBranchProbabilityInfo class, which has similar API to

2011-06-16 20:22:37 +00:00

SelectionDAGPrinter.cpp

…

TargetLowering.cpp

…

TargetSelectionDAGInfo.cpp

…