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7e598096ea
llvm-6502/lib/CodeGen/SelectionDAG
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Chris Lattner 7e598096ea Sink noop copies into the basic block that uses them. This reduces the number 
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.

This reduces the load on the coallescer and register allocator.  For example
on a codec on X86, we went from:

   1643 asm-printer           - Number of machine instrs printed
    419 liveintervals         - Number of loads/stores folded into instructions
   1144 liveintervals         - Number of identity moves eliminated after coalescing
   1022 liveintervals         - Number of interval joins performed
    282 liveintervals         - Number of intervals after coalescing
   1304 liveintervals         - Number of original intervals
     86 regalloc              - Number of times we had to backtrack
1.90232 regalloc              - Ratio of intervals processed over total intervals
     40 spiller               - Number of values reused
    182 spiller               - Number of loads added
    121 spiller               - Number of stores added
    132 spiller               - Number of register spills
      6 twoaddressinstruction - Number of instructions commuted to coalesce
    360 twoaddressinstruction - Number of two-address instructions

to:

   1636 asm-printer           - Number of machine instrs printed
    403 liveintervals         - Number of loads/stores folded into instructions
   1155 liveintervals         - Number of identity moves eliminated after coalescing
   1033 liveintervals         - Number of interval joins performed
    279 liveintervals         - Number of intervals after coalescing
   1312 liveintervals         - Number of original intervals
     76 regalloc              - Number of times we had to backtrack
1.88998 regalloc              - Ratio of intervals processed over total intervals
      1 spiller               - Number of copies elided
     41 spiller               - Number of values reused
    191 spiller               - Number of loads added
    114 spiller               - Number of stores added
    128 spiller               - Number of register spills
      4 twoaddressinstruction - Number of instructions commuted to coalesce
    356 twoaddressinstruction - Number of two-address instructions

On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted.  It increases the number
of register coallesces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 01:04:50 +00:00
..
DAGCombiner.cpp Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 2006-04-28 23:33:20 +00:00
LegalizeDAG.cpp Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 2006-05-03 01:29:57 +00:00
Makefile
ScheduleDAG.cpp Remove and simplify some more machineinstr/machineoperand stuff. 2006-05-04 18:16:01 +00:00
ScheduleDAGList.cpp Initial support for register pressure aware scheduling. The register reduction 2006-05-04 19:16:39 +00:00
ScheduleDAGSimple.cpp
SelectionDAG.cpp Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 2006-04-27 05:01:07 +00:00
SelectionDAGISel.cpp Sink noop copies into the basic block that uses them. This reduces the number 2006-05-05 01:04:50 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 2006-05-03 01:29:57 +00:00