llvm-6502/test/CodeGen
Ahmed Bougacha 17c1e34c12 [SelectionDAG] Teach the vector scalarizer about FP conversions.
This adds support for legalization of instructions of the form:

  [fp_conv] <1 x i1> %op to <1 x double>

where fp_conv is one of fpto[us]i, [us]itofp.  This used to assert
because they were simply missing from the vector operand scalarizer.

A similar problem arose in r190830, with trunc instead.

Fixes PR20778.

Differential Revision: http://reviews.llvm.org/D5810


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220533 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-23 22:49:25 +00:00
..
AArch64 [SelectionDAG] Teach the vector scalarizer about FP conversions. 2014-10-23 22:49:25 +00:00
ARM Do not emit intermediate register for zero FP immediate 2014-10-23 15:31:50 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 nodes. 2014-10-16 15:41:51 +00:00
MSP430
NVPTX [MachineSink] Use the real post dominator tree 2014-10-15 03:27:43 +00:00
PowerPC [PATCH] Support select-cc for VSFRC when VSX is enabled 2014-10-22 16:58:20 +00:00
R600 R600/SI: Add another failing testcase for i1 copies 2014-10-22 05:30:42 +00:00
SPARC
SystemZ
Thumb [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex 2014-10-20 11:00:18 +00:00
Thumb2 ARM: Fix a bug which was causing convergence failure in constant-island pass. 2014-10-17 01:31:47 +00:00
X86 ScheduleDAG: record PhysReg dependencies represented by CopyFromReg nodes 2014-10-23 22:31:48 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00