Jim Grosbach 80d01dd3d1 ARM assembly parsing of MRS instruction. ... Teach the parser to recognize the APSR and SPSR system register names. Add and update tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135527 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-19 21:59:29 +00:00
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CodeGen	Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or	2011-07-19 20:34:00 +00:00
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FrontendC	More minor adjustments.	2011-07-16 07:28:35 +00:00
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Linker	fix rdar://9776316 - type remapping needed for inline asm blobs,	2011-07-15 23:18:40 +00:00
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MC	ARM assembly parsing of MRS instruction.	2011-07-19 21:59:29 +00:00
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Transforms	Remove bogus test: for all possible inputs of %X, the 'sub nsw' is guaranteed	2011-07-19 08:22:57 +00:00
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