Jim Grosbach 80d01dd3d1 ARM assembly parsing of MRS instruction. ... Teach the parser to recognize the APSR and SPSR system register names. Add and update tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135527 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-19 21:59:29 +00:00
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ARM	ARM assembly parsing of MRS instruction.	2011-07-19 21:59:29 +00:00
AsmParser	Asm parser range checking on .<size> <value> directives.	2011-06-29 16:05:14 +00:00
COFF
Disassembler	Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873.	2011-07-16 02:41:28 +00:00
ELF	PR10370: Make sure we know how to relax push correctly on x86-64.	2011-07-15 21:28:39 +00:00
MachO
MBlaze
X86	Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a	2011-07-06 17:23:46 +00:00