llvm-6502/test/CodeGen
Hal Finkel 80d10ded8c PPC: Initial support for permutation-based unaligned Altivec loads
Altivec only directly supports aligned loads, but the loads have a strange
property: If given an unaligned address, they truncate the address to the next
lower aligned address, and load from there.  This property, along with an extra
load and some special-purpose permutation-control instructions that generate
the appropriate permutations from the original unaligned address, allow
efficient lowering of aligned loads. This code uses the trick explained in the
Apple Velocity Engine optimization overview document to prevent the needed
extra load from possibly causing a page fault if the original address happens
to be aligned.

As noted in the FIXMEs, there are several additional optimizations that can be
performed to reduce the cost of these loads even more. These will be
implemented in future commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182691 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-24 23:00:14 +00:00
..
AArch64 More test coverage for addFrameMove. 2013-05-16 20:50:56 +00:00
ARM ARM: implement @llvm.readcyclecounter intrinsic 2013-05-23 19:11:20 +00:00
CPP
Generic Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen. 2013-05-21 14:37:16 +00:00
Hexagon
Inputs
MBlaze
Mips [mips] Rename option to make it compatible with gcc. 2013-05-21 17:17:59 +00:00
MSP430
NVPTX [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic 2013-05-21 16:51:30 +00:00
PowerPC PPC: Initial support for permutation-based unaligned Altivec loads 2013-05-24 23:00:14 +00:00
R600 R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 2013-05-23 18:26:42 +00:00
SI
SPARC Also expand 64-bit bitcasts. 2013-05-20 01:01:43 +00:00
SystemZ [SystemZ] Tighten branch tests 2013-05-21 08:53:17 +00:00
Thumb
Thumb2
X86 Add a new function attribute 'cold' to functions. 2013-05-24 12:26:52 +00:00
XCore