llvm-6502/test/CodeGen
Bruno Cardoso Lopes 4abd22ba6b [PeepholeOptimizer] Look through PHIs to find additional register sources
Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243271 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 14:39:46 +00:00
..
AArch64 [AArch64][FastISel] Always use an AND instruction when truncating to non-legal types. 2015-07-25 02:16:53 +00:00
AMDGPU AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround 2015-07-27 11:37:42 +00:00
ARM DI/Verifier: Fix argument bitrot in DILocalVariable 2015-07-24 23:59:25 +00:00
BPF
CPP
Generic DI/Verifier: Fix argument bitrot in DILocalVariable 2015-07-24 23:59:25 +00:00
Hexagon [Hexagon] Generate MUX from conditional transfers when dot-new not possible 2015-07-20 21:23:25 +00:00
Inputs
Mips
MIR MIR Serialization: Serialize MachineFrameInfo's callee saved information. 2015-07-24 22:22:50 +00:00
MSP430
NVPTX [BranchFolding] do not iterate the aliases of virtual registers 2015-07-22 04:16:52 +00:00
PowerPC Fix PPCMaterializeInt to check the size of the integer based on the 2015-07-25 00:48:08 +00:00
SPARC
SystemZ
Thumb [ARM] Make the frame lowering code ready for shrink-wrapping. 2015-07-22 16:34:37 +00:00
Thumb2 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-21 00:18:59 +00:00
WebAssembly WebAssembly: test that valid -mcpu flags are accepted. 2015-07-23 23:00:04 +00:00
WinEH
X86 [PeepholeOptimizer] Look through PHIs to find additional register sources 2015-07-27 14:39:46 +00:00
XCore