llvm-6502/test/CodeGen
2014-05-08 18:53:56 +00:00
..
AArch64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
ARM Make a CodeGen test more robust against vector register selection 2014-05-08 18:53:56 +00:00
ARM64 [ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls. 2014-05-08 12:53:50 +00:00
CPP
Generic MC: move test from Generic to COFF 2014-04-23 21:41:07 +00:00
Hexagon
Inputs
Mips Add basic functionality for assignment of ints. 2014-05-01 20:39:21 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX Fix the test: DCE optimized away everything. 2014-04-21 17:23:12 +00:00
PowerPC [PowerPC] Fix rlwimi isel when mask is not constant 2014-04-13 17:10:58 +00:00
R600 R600: Expand i64 ISD:SUB 2014-05-05 21:47:15 +00:00
SPARC Remove the -disable-cfi option. 2014-05-05 17:33:26 +00:00
SystemZ Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
Thumb Make this test not match its own filename, when being run from a path that includes the string 'add'. 2014-04-15 22:29:32 +00:00
Thumb2 Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
X86 [X86] Add target specific combine rules to fold SSE2/AVX2 packed arithmetic shift intrinsics. 2014-05-08 17:44:04 +00:00
XCore Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl" 2014-04-21 17:57:07 +00:00