Justin Bogner 8115f93cdb Make a CodeGen test more robust against vector register selection ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208351 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-08 18:53:56 +00:00
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AArch64	AArch64/ARM64: optimise vector selects & enable test	2014-05-07 14:10:27 +00:00
ARM	Make a CodeGen test more robust against vector register selection	2014-05-08 18:53:56 +00:00
ARM64	[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.	2014-05-08 12:53:50 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600	R600: Expand i64 ISD:SUB	2014-05-05 21:47:15 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	[X86] Add target specific combine rules to fold SSE2/AVX2 packed arithmetic shift intrinsics.	2014-05-08 17:44:04 +00:00
XCore