llvm-6502/lib/CodeGen/SelectionDAG
Dan Gohman a90c8e690b Fold x-0 to x in unsafe-fp-math mode. This comes up in the
testcase from PR3376, and in fact is sufficient to completely
avoid the problem in that testcase.

There's an underlying problem though; TLI.isOperationLegal
considers Custom to be Legal, which might be ok in some
cases, but that's what DAGCombiner is using in many places
to test if something is legal when LegalOperations is true.
When DAGCombiner is running after legalize, this isn't
sufficient. I'll address this in a separate commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62860 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 19:10:37 +00:00
..
CallingConvLower.cpp Add "inreg" field to CallSDNode (doesn't increase 2008-09-26 19:31:26 +00:00
CMakeLists.txt Experimental post-pass scheduling support. Post-pass scheduling 2008-11-19 23:18:57 +00:00
DAGCombiner.cpp Fold x-0 to x in unsafe-fp-math mode. This comes up in the 2009-01-23 19:10:37 +00:00
FastISel.cpp Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 2009-01-22 09:10:11 +00:00
LegalizeDAG.cpp Add SelectionDAG::getNOT method to construct bitwise NOT operations, 2009-01-22 17:39:32 +00:00
LegalizeFloatTypes.cpp Cleanup whitespace and comments, and tweak some 2009-01-21 09:00:29 +00:00
LegalizeIntegerTypes.cpp Cleanup whitespace and comments, and tweak some 2009-01-21 09:00:29 +00:00
LegalizeTypes.cpp Cleanup whitespace and comments, and tweak some 2009-01-21 09:00:29 +00:00
LegalizeTypes.h Cleanup whitespace and comments, and tweak some 2009-01-21 09:00:29 +00:00
LegalizeTypesGeneric.cpp Preserve SourceValue information when lowering produces multiple loads from 2008-12-16 18:25:36 +00:00
LegalizeVectorTypes.cpp Added missing support to widen an operand from a bit convert. 2009-01-15 22:43:38 +00:00
Makefile Removed trailing whitespace from Makefiles. 2009-01-09 16:44:42 +00:00
ScheduleDAGFast.cpp Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 2009-01-15 19:20:50 +00:00
ScheduleDAGList.cpp Initial hazard recognizer support in post-pass scheduling. This includes 2009-01-16 01:33:36 +00:00
ScheduleDAGRRList.cpp Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 2009-01-15 19:20:50 +00:00
ScheduleDAGSDNodes.cpp CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions. 2009-01-16 20:57:18 +00:00
ScheduleDAGSDNodesEmit.cpp Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 2009-01-22 09:10:11 +00:00
SelectionDAG.cpp Fold x-0 to x in unsafe-fp-math mode. This comes up in the 2009-01-23 19:10:37 +00:00
SelectionDAGBuild.cpp Cleanup whitespace and comments, and tweak some 2009-01-21 09:00:29 +00:00
SelectionDAGBuild.h Initial checkin of APInt'ififcation of switch lowering 2008-12-23 22:25:27 +00:00
SelectionDAGISel.cpp Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 2009-01-20 19:12:24 +00:00
SelectionDAGPrinter.cpp Use DebugInfo interface to lower dbg_* intrinsics. 2009-01-13 00:35:13 +00:00
TargetLowering.cpp Add SelectionDAG::getNOT method to construct bitwise NOT operations, 2009-01-22 17:39:32 +00:00