Evan Cheng 8239daf7c8 Two sets of changes. Sorry they are intermingled. ... 1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to "optimize for latency". Call instructions don't have the right latency and this is more likely to use introduce spills. 2. Fix if-converter cost function. For ARM, it should use instruction latencies, not # of micro-ops since multi-latency instructions is completely executed even when the predicate is false. Also, some instruction will be "slower" when they are predicated due to the register def becoming implicit input. rdar://8598427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-03 00:45:17 +00:00
..
CMakeLists.txt	Removed a bunch of unnecessary target_link_libraries.	2010-09-28 22:39:14 +00:00
DAGCombiner.cpp	Remove DAG combiner patch to fold vector splats. Instcombiner does it now.	2010-10-29 22:03:02 +00:00
FastISel.cpp	Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.	2010-09-14 20:29:31 +00:00
FunctionLoweringInfo.cpp	Reapply r112623. Included additional check for unused byval argument.	2010-08-31 22:22:42 +00:00
InstrEmitter.cpp	Revert r112461. It was failing on PPC...	2010-08-30 04:36:50 +00:00
InstrEmitter.h	Don't set kill flags for instructions which the scheduler has cloned.	2010-05-14 22:01:14 +00:00
LegalizeDAG.cpp	Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any	2010-10-19 23:27:08 +00:00
LegalizeFloatTypes.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeIntegerTypes.cpp	propagate MachinePointerInfo through various uses of the old	2010-09-21 17:04:51 +00:00
LegalizeTypes.cpp	continue MachinePointerInfo'izing, eliminating use of one of the old	2010-09-21 16:36:31 +00:00
LegalizeTypes.h	implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.	2010-08-26 05:51:22 +00:00
LegalizeTypesGeneric.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeVectorOps.cpp	Change UpdateNodeOperands' operand and return value from SDValue to	2010-06-18 15:30:29 +00:00
LegalizeVectorTypes.cpp	Remove Synthesizable from the Type system; as MMX vector	2010-10-20 21:32:10 +00:00
Makefile	make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.	2010-01-24 20:43:08 +00:00
ScheduleDAGFast.cpp	Make fast scheduler handle asm clobbers correctly.	2010-08-17 22:17:24 +00:00
ScheduleDAGList.cpp	Trim #include.	2010-05-26 00:55:59 +00:00
ScheduleDAGRRList.cpp	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
ScheduleDAGSDNodes.cpp	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
ScheduleDAGSDNodes.h	Teach if-converter to be more careful with predicating instructions that would	2010-09-10 01:29:16 +00:00
SDNodeDbgValue.h	Add const qualifiers to CodeGen's use of LLVM IR constructs.	2010-04-15 01:51:59 +00:00
SDNodeOrdering.h	Allow 0 as an order number. Don't assign an order to formal arguments.	2009-12-22 21:35:02 +00:00
SelectionDAG.cpp	Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches	2010-10-26 23:11:10 +00:00
SelectionDAGBuilder.cpp	If value map does not have register for an argument then try to find frame index before giving up.	2010-11-02 17:19:03 +00:00
SelectionDAGBuilder.h	When isel is emitting instructions for an x86 target without CMOV, the CFG is	2010-09-30 19:44:31 +00:00
SelectionDAGISel.cpp	For statistics that are only used in functions declared in !NDEBUG, wrap the	2010-10-26 00:51:57 +00:00
SelectionDAGPrinter.cpp	Eliminate unnecessary empty string literals.	2010-08-04 01:39:08 +00:00
TargetLowering.cpp	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
TargetSelectionDAGInfo.cpp	Implement a bunch more TargetSelectionDAGInfo infrastructure.	2010-05-11 17:31:57 +00:00