llvm-6502/lib/Target/AArch64
Chad Rosier 82c93451f3 [AArch64] Extend the number of scalar instructions supported in the AdvSIMD
scalar integer instruction pass.

This is a patch I had lying around from a few months ago.  The pass is
currently disabled by default, so nothing to interesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214779 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:20:25 +00:00
..
AsmParser Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
Disassembler Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
InstPrinter Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
MCTargetDesc Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
TargetInfo AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
Utils
AArch64.h Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64.td
AArch64AddressTypePromotion.cpp AArch64: Re-enable AArch64AddressTypePromotion 2014-07-02 18:17:40 +00:00
AArch64AdvSIMDScalarPass.cpp [AArch64] Extend the number of scalar instructions supported in the AdvSIMD 2014-08-04 21:20:25 +00:00
AArch64AsmPrinter.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64BranchRelaxation.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64CallingConvention.td ARM: Allow __fp16 as a function arg or return type for AArch64 2014-07-11 13:33:46 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64ConditionalCompares.cpp
AArch64DeadRegisterDefinitionsPass.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64ExpandPseudoInsts.cpp AArch64: remove unnecessary pseudo-instruction. 2014-07-14 11:16:02 +00:00
AArch64FastISel.cpp [FastISel][AArch64] Fold offset into the memory operation. 2014-08-01 19:40:16 +00:00
AArch64FrameLowering.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
AArch64InstrInfo.cpp Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
AArch64InstrInfo.h Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
AArch64InstrInfo.td [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file. 2014-07-24 01:29:59 +00:00
AArch64ISelDAGToDAG.cpp
AArch64ISelLowering.cpp [AArch64] Generate tbz/tbnz when comparing against zero. 2014-08-01 14:48:56 +00:00
AArch64ISelLowering.h Add alignment value to allowsUnalignedMemoryAccess 2014-07-27 17:46:40 +00:00
AArch64LoadStoreOptimizer.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h Implement AArch64 TTI interface isAsCheapAsAMove. 2014-07-29 02:09:26 +00:00
AArch64TargetMachine.cpp Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
CMakeLists.txt
LLVMBuild.txt Prune redundant libdeps. 2014-07-24 11:45:27 +00:00
Makefile