llvm-6502/lib/CodeGen/SelectionDAG
Evan Cheng bf34a5ec22 sext(undef) = 0, because the top bits will all be the same.
zext(undef) = 0, because the top bits will be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15 02:22:10 +00:00
..
CMakeLists.txt
DAGCombiner.cpp Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613. 2011-03-11 00:48:56 +00:00
FastISel.cpp Teach FastISel to support register-immediate-immediate instructions. 2011-03-11 21:33:55 +00:00
FunctionLoweringInfo.cpp There are times when the landing pad won't have a call to 'eh.selector' in 2011-03-03 23:14:05 +00:00
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp Use the correct LHS type when determining the legalization of a shift's RHS type. 2011-03-07 18:29:47 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp Revert commit 126684 "Use the correct shift amount type". It is only the correct 2011-03-04 14:28:59 +00:00
LegalizeTypes.cpp
LegalizeTypes.h Revert r123908; the code in question is completely untested and wrong. 2011-03-03 22:33:23 +00:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp
Makefile
ScheduleDAGFast.cpp Re-commit 127368 and 127371. They are exonerated. 2011-03-10 00:16:32 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp Re-commit 127368 and 127371. They are exonerated. 2011-03-10 00:16:32 +00:00
ScheduleDAGSDNodes.cpp Improve pre-RA-sched register pressure tracking for duplicate operands. 2011-03-09 19:12:43 +00:00
ScheduleDAGSDNodes.h
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp sext(undef) = 0, because the top bits will all be the same. 2011-03-15 02:22:10 +00:00
SelectionDAGBuilder.cpp Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text. 2011-03-11 17:46:59 +00:00
SelectionDAGBuilder.h
SelectionDAGISel.cpp
SelectionDAGPrinter.cpp
TargetLowering.cpp
TargetSelectionDAGInfo.cpp