Tom Stellard 8352b74577 R600/SI: Add assembler support for all CI and VI VOP2 instructions ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238211 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-26 15:55:52 +00:00
..
AArch64	[AArch64] Clean up the ELF streamer a bit.	2015-05-23 16:39:10 +00:00
ARM	[AArch64] Clean up the ELF streamer a bit.	2015-05-23 16:39:10 +00:00
AsmParser	Relax these tests a bit.	2015-05-22 21:37:13 +00:00
COFF	Don't omit the constant when computing a cross-section relative relocation.	2015-05-14 01:10:41 +00:00
Disassembler	This patch adds support for the vector quadword add/sub instructions introduced	2015-05-25 15:49:26 +00:00
ELF	Produce a single string table in a ELF .o	2015-05-22 23:58:30 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO	AArch64: work around ld64 bug more aggressively.	2015-05-18 22:07:20 +00:00
Markup
Mips	Relax these tests a bit.	2015-05-22 21:37:13 +00:00
PowerPC	This patch adds support for the vector quadword add/sub instructions introduced	2015-05-25 15:49:26 +00:00
R600	R600/SI: Add assembler support for all CI and VI VOP2 instructions	2015-05-26 15:55:52 +00:00
Sparc	Sparc: support the "set" synthetic instruction.	2015-05-18 16:43:33 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set	2015-05-18 06:42:57 +00:00