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.cvsignore
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Tired of wading through cvs's list ? files that are generated when building
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2006-03-23 23:41:57 +00:00 |
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2002-12-23-LocalRAProblem.llx
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2002-12-23-SubProblem.llx
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2003-08-03-CallArgLiveRanges.llx
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2003-08-23-DeadBlockTest.llx
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2003-11-03-GlobalBool.llx
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2004-02-12-Memcpy.llx
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2004-02-13-FrameReturnAddress.llx
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2004-02-14-InefficientStackPointer.llx
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2004-02-22-Casts.llx
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2004-03-30-Select-Max.llx
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2004-04-09-SameValueCoalescing.llx
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2004-04-13-FPCMOV-Crash.llx
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2004-06-10-StackifierCrash.llx
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2004-10-08-SelectSetCCFold.llx
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2005-08-30-RegAllocAliasProblem.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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2005-12-03-IndirectTailCall.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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2006-01-19-ISelFoldingBug.ll
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2006-01-30-LongSetcc.ll
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2006-03-01-InstrSchedBug.ll
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Add a regression test for bug 478.
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2006-03-02 21:48:34 +00:00 |
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2006-03-02-InstrSchedBug.ll
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Add another test case for instruction scheduling.
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2006-03-03 18:58:09 +00:00 |
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2006-04-04-CrossBlockCrash.ll
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new testcase
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2006-04-05 06:54:14 +00:00 |
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2006-04-27-ISelFoldingBug.ll
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Fix the test failure on non-Darwin targets.
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2006-05-30 20:35:46 +00:00 |
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2006-05-01-SchedCausingSpills.ll
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A few instruction scheduling test cases.
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2006-05-03 02:11:36 +00:00 |
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2006-05-02-InstrSched1.ll
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A few instruction scheduling test cases.
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2006-05-03 02:11:36 +00:00 |
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2006-05-02-InstrSched2.ll
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Temporarily xfail this test, evan will look at it in a week or so.
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2006-08-18 00:18:38 +00:00 |
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2006-05-08-CoalesceSubRegClass.ll
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Test case for PR770
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2006-05-09 06:48:12 +00:00 |
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2006-05-08-InstrSched.ll
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Improved codegen due to Chris' live interval joining changes.
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2006-08-26 07:38:36 +00:00 |
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2006-05-11-InstrSched.ll
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-sched-commute-nodes is now on by default.
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2006-05-25 08:39:25 +00:00 |
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2006-05-17-VectorArg.ll
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New test case for vector type argument pass by value.
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2006-05-17 20:20:04 +00:00 |
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2006-05-22-FPSetEQ.ll
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Added a test case for FP equality check.
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2006-05-23 06:41:23 +00:00 |
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2006-05-25-CycleInDAG.ll
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New test case. x86 isel was creating a cycle in the DAG.
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2006-05-25 20:21:19 +00:00 |
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2006-07-10-InlineAsmAConstraint.ll
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New testcase for PR825.
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2006-07-11 02:52:37 +00:00 |
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2006-07-12-InlineAsmQConstraint.ll
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Testcase for PR828.
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2006-07-12 16:59:09 +00:00 |
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2006-07-19-ATTAsm.ll
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Regression test for PR834.
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2006-07-19 16:37:15 +00:00 |
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2006-07-20-InlineAsm.ll
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New testcase for PR833
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2006-07-20 19:04:36 +00:00 |
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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New testcase for PR853
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2006-07-29 01:50:53 +00:00 |
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2006-07-31-SingleRegClass.ll
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New testcase for PR850.
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2006-07-31 23:25:17 +00:00 |
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2006-08-07-CycleInDAG.ll
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New test case.
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2006-08-07 23:58:47 +00:00 |
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2006-08-16-CycleInDAG.ll
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Another cyclic dag test case.
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2006-08-17 00:00:46 +00:00 |
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2006-08-21-ExtraMovInst.ll
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Added a check so that if we have two machine instructions in this form
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2006-08-21 07:33:33 +00:00 |
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bswap.ll
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commute-two-addr.ll
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compare_folding.llx
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compare-add.ll
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dg.exp
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Added the ability to xfail based on llvmgcc version
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2006-04-12 21:57:40 +00:00 |
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div_const.ll
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Testcase for GCC bug28417, ensuring that we don't start getting it wrong
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2006-07-30 17:46:37 +00:00 |
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extend.ll
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fabs.ll
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This is also a 32-bit only test. x86-64 would pass fp parameters through XMM registers.
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2006-08-29 22:01:39 +00:00 |
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fast-cc-callee-pops.ll
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allow this to pass on non-x86 machines
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2006-07-26 20:44:24 +00:00 |
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fast-cc-merge-stack-adj.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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fast-cc-pass-in-regs.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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fast-cc-tail-call.ll
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fildll.ll
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fp_constant_op.llx
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fp_load_cast_fold.llx
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fp_load_fold.llx
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fp-immediate-shorten.ll
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Also requires -mattr=-sse3
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2006-03-15 18:05:13 +00:00 |
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imul-lea.ll
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New test case: use lea for imul by some constants.
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2006-02-25 10:16:10 +00:00 |
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inline-asm.ll
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Add new testcase
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2006-06-08 18:26:48 +00:00 |
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isnan.llx
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lea.ll
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Add a lea instruction selection test case.
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2006-05-30 06:53:55 +00:00 |
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loop-strength-reduce.ll
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Option -enable-x86-lsr has been removed
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2006-03-20 18:26:11 +00:00 |
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mul-shift-reassoc.ll
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new testcase
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2006-03-01 03:43:38 +00:00 |
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negatize_zero.ll
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Also requires -mattr=-sse3
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2006-03-15 18:05:13 +00:00 |
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overlap-add.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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overlap-shift.ll
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Intel mode no longer uses %'s on registers
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2006-05-01 05:56:51 +00:00 |
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rdtsc.ll
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regpressure.ll
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rotate.ll
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select.ll
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setuge.ll
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shift-coalesce.ll
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new testcase for pr687
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2006-08-29 23:09:59 +00:00 |
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shift-double.llx
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shift-folding.ll
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shift-one.ll
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Add a test case for left shift by 1. We should not be using lea for this.
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2006-02-28 23:57:45 +00:00 |
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sse-load-ret.ll
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store_op_load_fold2.ll
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Fix test case so it passes on x86-64.
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2006-08-29 21:49:58 +00:00 |
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store_op_load_fold.ll
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weak globals on darwin require an extra load, breaking this test
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2006-03-10 17:55:10 +00:00 |
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store-fp-constant.ll
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store-global-address.ll
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New test case: use lea for imul by some constants.
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2006-02-25 10:16:10 +00:00 |
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unpcklps.ll
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new testcase
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2006-03-28 20:32:12 +00:00 |
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vec_call.ll
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Added a test case for parameter passing of vector values.
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2006-05-30 20:37:00 +00:00 |
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vec_clear.ll
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Check for llc crash.
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2006-04-21 01:21:23 +00:00 |
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vec_extract.ll
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Update vector extract test cases.
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2006-05-31 00:48:09 +00:00 |
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vec_ins_extract.ll
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new testcase, not currently working.
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2006-06-14 21:24:57 +00:00 |
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vec_insert.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_return.ll
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New testcase
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2006-04-17 20:32:27 +00:00 |
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vec_select.ll
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Add a vselect test case.
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2006-04-10 07:30:13 +00:00 |
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vec_set-2.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_set-3.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_set-4.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_set-5.ll
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Two more build_vector tests.
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2006-04-22 06:19:11 +00:00 |
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vec_set-6.ll
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Two more build_vector tests.
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2006-04-22 06:19:11 +00:00 |
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vec_set-7.ll
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Added a movq test case.
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2006-04-24 23:03:22 +00:00 |
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vec_set.ll
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Add a BUILD_VECTOR with unpack and interleave testcase.
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2006-03-25 09:48:14 +00:00 |
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vec_shuffle-2.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_shuffle-3.ll
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Add && to each RUN: line (except the last one).
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2006-04-21 04:58:23 +00:00 |
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vec_shuffle-4.ll
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Update. It should use two shufps, not three!
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2006-04-28 18:55:34 +00:00 |
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vec_shuffle-5.ll
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Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
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2006-05-03 20:32:03 +00:00 |
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vec_shuffle-6.ll
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Fix a broken test.
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2006-07-20 23:50:13 +00:00 |
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vec_shuffle-7.ll
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New vector shuffle test case.
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2006-07-20 23:51:01 +00:00 |
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vec_shuffle.ll
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Update
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2006-07-07 17:54:10 +00:00 |
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vec_splat-2.ll
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v16i8 splat with 2 punpcklbw and a single pshufd.
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2006-04-20 09:05:16 +00:00 |
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vec_splat.ll
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movddup is a SSE3 instruction.
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2006-04-21 16:42:47 +00:00 |
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vec_zero.ll
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Update test case.
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2006-07-05 20:46:27 +00:00 |
