Justin Holewinski 320185fa5f Add a target legalize hook for SplitVectorOperand (again) ... CustomLowerNode was not being called during SplitVectorOperand, meaning custom legalization could not be used by targets. This also adds a test case for NVPTX that depends on this custom legalization. Differential Revision: http://llvm-reviews.chandlerc.com/D1195 Attempt to fix the buildbots by making the X86 test I just added platform independent git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-26 13:28:29 +00:00
..
add-128bit.ll	[NVPTX] 64-bit ADDC/ADDE are not legal	2013-07-01 12:59:04 +00:00
annotations.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
calling-conv.ll
compare-int.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
convert-fp.ll
convert-int-sm20.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ctlz.ll	[NVPTX] Add support for cttz/ctlz/ctpop	2013-06-28 17:58:07 +00:00
ctpop.ll	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.	2013-07-13 20:38:47 +00:00
cttz.ll	[NVPTX] Add support for cttz/ctlz/ctpop	2013-06-28 17:58:07 +00:00
fast-math.ll	[NVPTX] Use approximate FP ops when unsafe-fp-math is used, and append	2013-07-22 12:18:04 +00:00
fma-disable.ll
fma.ll
generic-to-nvvm.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
global-ordering.ll
i1-global.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
i1-param.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
i8-param.ll	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.	2013-07-13 20:38:47 +00:00
intrin-nocapture.ll
intrinsic-old.ll	[NVPTX] Re-enable support for virtual registers in the final output	2013-05-31 12:14:49 +00:00
intrinsics.ll	[NVPTX] Re-enable support for virtual registers in the final output	2013-05-31 12:14:49 +00:00
ld-addrspace.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ld-generic.ll	[NVPTX] Calling conventions fix	2013-06-28 17:58:10 +00:00
ldu-i8.ll	[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value	2013-07-01 12:58:48 +00:00
ldu-reg-plus-offset.ll	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.	2013-07-13 20:38:47 +00:00
lit.local.cfg
load-sext-i1.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
module-inline-asm.ll	[NVPTX] Add support for module-scope inline asm	2013-07-01 13:00:14 +00:00
nvvm-reflect.ll
param-align.ll
pr13291-i1-store.ll	[NVPTX] Clean up comparison/select/convert patterns and factor out PTX instructions from their patterns	2013-06-28 17:58:04 +00:00
pr16278.ll	[NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space	2013-06-10 13:29:47 +00:00
ptx-version-30.ll
ptx-version-31.ll
refl1.ll	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
rsqrt.ll	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.	2013-07-13 20:38:47 +00:00
sched1.ll
sched2.ll
sext-in-reg.ll	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.	2013-07-13 20:38:47 +00:00
sext-params.ll	[NVPTX] Handle signext/zeroext attributes properly	2013-07-01 12:58:58 +00:00
simple-call.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll	[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.	2013-06-28 17:57:59 +00:00
st-generic.ll	[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.	2013-06-28 17:57:59 +00:00
tuple-literal.ll
vec-param-load.ll	[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos	2013-07-01 12:59:01 +00:00
vector-args.ll	[NVPTX] Add support for vectorized function return values	2013-06-28 17:57:55 +00:00
vector-compare.ll
vector-loads.ll
vector-select.ll
vector-stores.ll	Add a target legalize hook for SplitVectorOperand (again)	2013-07-26 13:28:29 +00:00