..
Analysis.h
AsmPrinter.h
Trailing whitespace.
2010-07-01 01:00:22 +00:00
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h
Reapply bottom-up fast-isel, with several fixes for x86-32:
2010-07-10 09:00:22 +00:00
FastISel.h
Reapply bottom-up fast-isel, with several fixes for x86-32:
2010-07-10 09:00:22 +00:00
FunctionLoweringInfo.h
Reapply bottom-up fast-isel, with several fixes for x86-32:
2010-07-10 09:00:22 +00:00
GCMetadata.h
Trailing whitespace.
2010-07-01 01:00:22 +00:00
GCMetadataPrinter.h
Trailing whitespace.
2010-07-01 01:00:22 +00:00
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h
When splitting a VAARG, remember its alignment.
2010-06-26 18:22:20 +00:00
JITCodeEmitter.h
LatencyPriorityQueue.h
Eliminate the use of PriorityQueue and just use a std::vector,
2010-05-26 18:52:00 +00:00
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
Remove the local register allocator.
2010-06-15 21:58:33 +00:00
LiveInterval.h
Rematerialize as much as possible before inserting spills and reloads.
2010-07-02 17:44:57 +00:00
LiveIntervalAnalysis.h
Remove the now unused LiveIntervals::getVNInfoSourceReg().
2010-06-24 20:18:15 +00:00
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
Add a getFirstNonPHI utility function.
2010-07-07 14:33:51 +00:00
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
2010-07-03 00:40:23 +00:00
MachineFunction.h
Revert r107205 and r107207.
2010-06-29 22:34:52 +00:00
MachineFunctionAnalysis.h
MachineFunctionPass.h
Make MachineFunctionPass::createPrinterPass private, as no subclasses
2010-06-05 01:19:12 +00:00
MachineInstr.h
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
2010-07-08 16:40:22 +00:00
MachineInstrBuilder.h
MachineJumpTableInfo.h
Add explicit keywords.
2010-06-18 19:04:37 +00:00
MachineLocation.h
MachineLoopInfo.h
Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out
2010-06-22 17:25:57 +00:00
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
Add a TargetRegisterInfo::composeSubRegIndices hook with a default
2010-05-28 18:18:53 +00:00
MachinePassRegistry.h
MachineRegisterInfo.h
Begin implementation of an inline spiller.
2010-06-29 23:58:39 +00:00
MachineRelocation.h
MachineSSAUpdater.h
MachORelocation.h
ObjectCodeEmitter.h
Passes.h
Remove the local register allocator.
2010-06-15 21:58:33 +00:00
PostRAHazardRecognizer.h
Add missing include to unbreak the build.
2010-06-14 22:44:26 +00:00
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h
Be more forgiving when calculating alias interference for physreg coalescing.
2010-07-06 20:31:51 +00:00
RegisterScavenging.h
After r107880, findSurvivorReg() no longer needs to be public.
2010-07-08 17:27:23 +00:00
RuntimeLibcalls.h
back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
2010-06-18 23:03:10 +00:00
ScheduleDAG.h
Change push_all to a non-virtual function and implement it in the
2010-05-26 01:10:55 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h
Add a hybrid bottom up scheduler that reduce register usage while avoiding
2010-05-20 06:13:19 +00:00
SelectionDAG.h
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
2010-07-07 22:15:37 +00:00
SelectionDAGISel.h
Reapply bottom-up fast-isel, with several fixes for x86-32:
2010-07-10 09:00:22 +00:00
SelectionDAGNodes.h
Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and
2010-07-07 15:28:42 +00:00
SlotIndexes.h
Added a support for inserting new MBBs into the numbering.
2010-07-09 09:19:23 +00:00
TargetLoweringObjectFileImpl.h
More data/parsing support for tls directives. Add a few more testcases
2010-05-17 22:53:55 +00:00
ValueTypes.h
Fix enum to address array bounds regression.
2010-05-18 21:22:12 +00:00
ValueTypes.td
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
2010-05-13 23:55:47 +00:00
84023e0fbe